Attention is currently required from: Alexander Couzens, Arthur Heymans, Krystian Hebel, Maciej Pijanowski, Michał Kopeć, Michał Żygowski, Paul Menzel.
Nicholas Sudsgaard has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80610?usp=email )
Change subject: mb/lenovo: Add ThinkCentre M700/M900 Tiny board (Skylake/Kaby Lake) ......................................................................
Patch Set 5:
(9 comments)
Patchset:
PS5: Looks nice, just a few small things. 👍
File src/mainboard/lenovo/m900_tiny/Kconfig:
PS5: Add SPDX license here.
File src/mainboard/lenovo/m900_tiny/Kconfig.name:
PS5: Add SPDX license here.
File src/mainboard/lenovo/m900_tiny/acpi/ec.asl:
https://review.coreboot.org/c/coreboot/+/80610/comment/20119dae_f72b32bd : PS5, Line 1: GPL-2.0-or-later Empty files should use the CC-PDDC license (refer to CB:66497)
File src/mainboard/lenovo/m900_tiny/cmos.default:
PS5: Add SPDX license here (refer to CB:80597)
File src/mainboard/lenovo/m900_tiny/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80610/comment/1c2ec95a_12aa271e : PS5, Line 133: register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" # Front Port 1 I would suggest this format for bulk definitions. ``` register "usb2_ports" = "{ [0] = ..., // comment }" ``` The stuff inside the quotations is just C (hence the '//' style comment).
https://review.coreboot.org/c/coreboot/+/80610/comment/c8ef70d1_d44f4d5f : PS5, Line 142: register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Front Port 1 Here too.
https://review.coreboot.org/c/coreboot/+/80610/comment/fa081caf_9756be5b : PS5, Line 154: register "SataPortsEnable" = "{ \ '' is not necessary.
https://review.coreboot.org/c/coreboot/+/80610/comment/0b11711b_97c13cd1 : PS5, Line 162: register "SataPortsHotPlug" = "{ \ Here too.