Attention is currently required from: Subrata Banik, Tim Wawrzynczak, Rizwan Qureshi, Sridhar Siricilla, Arthur Heymans, Patrick Rudolph. Hello build bot (Jenkins), Subrata Banik, Tim Wawrzynczak, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62715
to look at the new patch set (#5).
Change subject: soc/intel/common: Add support to control CSE firmware update ......................................................................
soc/intel/common: Add support to control CSE firmware update
The patch adds support to control CSE Lite firmware update dynamically. In order to disable the CSE firmware update functionality, offset 0xf00 in the coreboot binary be updated with 0x1.
Run below command on the binary to disable CSE firmwar update
printf '\x01' | dd of=image-brya4es.serial.bin bs=1 seek=3840 count=1 conv=notrunc
BUG=b:153410586 TEST=Verified CSE firmware update functionality is not getting triggered after updating the offset:0xF00 in the coreboot binary.
........................ CB Logs ...................................... [DEBUG] prev_sleep_state 5 [DEBUG] cse_lite: Number of partitions = 3 [DEBUG] cse_lite: Current partition = RW [DEBUG] cse_lite: Next partition = RW [DEBUG] cse_lite: Flags = 0x3 [DEBUG] cse_lite: RO version = 16.0.15.1752 (Status=0x0, Start=0x2000, End=0x19bfff) [DEBUG] cse_lite: RW version = 16.0.15.1752 (Status=0x0, Start=0x205000, End=0x439fff) rt_debug: pre_mem_debug.cse_fw_update_disable=1 [DEBUG] Boot Count incremented to 956 .......................................................................
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: I9f234b142191eb83137d5d83f21e890e1cb828ba --- M src/soc/intel/common/basecode/debug/debug_feature.c M src/soc/intel/common/basecode/include/intelbasecode/debug_feature.h M src/soc/intel/common/block/cse/cse_lite.c 3 files changed, 30 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/62715/5