Nicholas Sudsgaard has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80411?usp=email )
Change subject: Documentation/mainboard/lenovo: Add ThinkCentre M710s ......................................................................
Documentation/mainboard/lenovo: Add ThinkCentre M710s
Change-Id: I90311257a28bd463712c4d43f8b83baa745509cc Signed-off-by: Nicholas Sudsgaard devel+coreboot@nsudsgaard.com --- M Documentation/mainboard/index.md A Documentation/mainboard/lenovo/ch341a_pinout.jpg A Documentation/mainboard/lenovo/thinkcentre_m710s.md A Documentation/mainboard/lenovo/thinkcentre_m710s_spi_location.jpg 4 files changed, 210 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/80411/1
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 519d888..ab09743 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -103,6 +103,7 @@ - [Mainboard codenames](lenovo/codenames.md) - [Hardware Maintenance Manual of ThinkPads](lenovo/thinkpad_hmm.md) - [R60](lenovo/r60.md) +- [ThinkCentre M710s](lenovo/thinkcentre_m710s) - [T4xx common](lenovo/t4xx_series.md) - [X2xx common](lenovo/x2xx_series.md) - [vboot](lenovo/vboot.md) diff --git a/Documentation/mainboard/lenovo/ch341a_pinout.jpg b/Documentation/mainboard/lenovo/ch341a_pinout.jpg new file mode 100644 index 0000000..42d18f0 --- /dev/null +++ b/Documentation/mainboard/lenovo/ch341a_pinout.jpg Binary files differ diff --git a/Documentation/mainboard/lenovo/thinkcentre_m710s.md b/Documentation/mainboard/lenovo/thinkcentre_m710s.md new file mode 100644 index 0000000..3590cc6 --- /dev/null +++ b/Documentation/mainboard/lenovo/thinkcentre_m710s.md @@ -0,0 +1,209 @@ +# Lenovo ThinkCentre M710s + +This page describes how to install coreboot onto Lenovo ThinkCentre M710s. + +This guide is written (hopefully) in a way that even dummies could follow through, +and it also assumes the reader is running a Linux environment. + +## Preparation + +### Step 1 - Setting up the environment + +```eval_rst +Start by following the :doc:`tutorial <../../tutorial/part1>` until step 3. +``` + +### Step 2 - Preserving the original flash image (IMPORTANT) + +Before proceeding, it is **VERY IMPORTANT** to keep the original (vendor) flash image. +Without this, it would be very difficult to recover from mistakes during +flashing (or if you decide coreboot is not for you). + + # Take 2 images of your original flash image + flashrom -p internal -r vendor.rom + flashrom -p internal -r vendor.rom.backup + + # Compare the images to see if there is any differences (should be none) + sha1sum vendor.rom vendor.rom.backup + + # Make the images immutable to prevent accidental modification/deletion + chattr +i vendor.rom vendor.rom.backup + # Check whether the 'i' flag is set + lsattr vendor.rom vendor.rom.backup + + # To be absolutely sure you can attempt to modifiy/delete the images + # You should get 'Operation not permitted' + echo "test" > vendor.rom + rm -f vendor.rom + +If you ever need to undo the installation, simply flash this image. +As long as you do this, flashing coreboot is not as scary as it sounds. :) + +### Step 3 - Getting the layout file + +Let's also use a layout file to be sure that we only modify the BIOS region +of your flash chip. This makes things simpler and reduces and chance of messing +up your flash chip. + + make -C util/ifdtool + ./util/ifdtool -f vendor.rom.layout vendor.rom + +The contents of `vendor.rom.layout` should look like the following: + + 00000000:00000fff fd + 00200000:007fffff bios + 00003000:001fffff me + 00001000:00002fff gbe + 00fff000:00000fff pd + +Now you have everything ready to start building coreboot! + +## Configuring and building coreboot + +### Step 1 - Configuring + +coreboot provides an easy way of configuration by using a TUI menu. To open this +run the following command: + + make menuconfig + +While it should be quite intuitive, the navigation is written at the top if you +get stuck. + +Every mainboard is different and you need to instruct coreboot to build for +Lenovo ThinkCentre M710s specifically. + + Mainboard ---> + Mainboard vendor (Lenovo) ---> + Mainboard model (ThinkCentre M710s) ---> + +### Step 2 - Choosing the payload + +Now you can choose the payload that you are going to use: + + * SeaBIOS + * Tianocore's EDK 2 (choose this if unsure) + +It is highly recommend not choosing anything else, as they have not been tested +and are most likely not going to work. + +#### SeaBIOS + + Payload ---> + Payload to add (SeaBIOS) ---> + +#### EDK 2 + + Payload ---> + Payload to add (edk2 payload) ---> + Tianocore's EDK II payload (Official edk2 repository) ---> + +While understandable, it is recommended to resist the temptation of doing any +additional configuration if this is your first time building coreboot. + +### Step 3 - Building coreboot + +Finally, save your changes and build coreboot (this should only take a couple of minutes). + + make -j$(nproc) + +## Flashing coreboot + +### Internal programming + +This is the simpler option and can be done in a single command. + + flashrom -p internal -l vendor.rom.layout -i bios -w build/coreboot.rom + +This is also the method of updating coreboot. + +### External programming + +#### Step 1 - Locate the SPI flash chip + +First, disconnect everything (especially the power cable) from your machine and +open your chasis. If you are not sure how to open up the chasis follow these +[instructions](https://download.lenovo.com/pccbbs/pubs/m710s/en/contents/crus07.html). +However, do not follow the guides exactly as they are for replacing parts (but +it should give you a good enough idea). + +Once you opened up the chasis you need to locate the SPI flash chip. You should +be able to find it easily as it is quite distinct. You may also want to +disconnect any nearby SATA cables as it could make attaching the clip slightly +difficult. + +![](thinkcentre_m710s_spi_location.jpg) + +The datasheet to this SPI flash chip can be found [here](https://www.winbond.com/hq/product/code-storage-flash-memory/serial-nor-flas...) (W25Q64JV). + +#### Step 2 - Attaching the clip + +**Make sure you attach the clip using the correct pin configurations** (page 6 of +the datasheet or the image above), as it may **damage your chip** if done incorrectly. +How to do this depends on your programmer of choice and refer to other +documentation which can be found on the internet. + +While [not recommended](https://libreboot.org/docs/install/spi.html#do-not-use-ch341a) +the CH431A programmer seems to be very popular. However, it can be slightly +confusing at first. Here is the pinout and which half to use ([datasheet](https://www.alldatasheet.com/datasheet-pdf/pdf/1132609/ETC2/CH341A.html)). + +![](ch341a_pinout.jpg) + +#### Step 3 - Flashing + +Once you have the clip attached, you can run the following command: + + flashrom -p <programmer> -c 'W25Q64BV/W25Q64CV/W25Q64FV' -l vendor.rom.layout -i bios -w build/coreboot.rom + +You may get the error `No EEPROM/flash device found`. This usually means the +clip is not attached properly and you need to reattach it. + +## Booting + +Hopefully, everything went well. Now it is time to boot the machine! The first +time booting coreboot may be slightly strange (rebooting multiple times, takes +longer to boot), however this is normal and there is nothing to worry about. + +```eval_rst +In the unfortunate case, where your machine does not seem to boot, first check +for any mistakes. If you are confident that you did not make any mistakes +reach out to the :doc:`community <../../community/forums>` for some help. +``` + +## Status + +### Working + * Ubuntu 22.04.1 (Linux 6.5.0) using payloads: + * SeaBIOS + * Tianocore's EDK 2 + * Internal flashing + * PCIe + * SATA + * M.2 SSD + * M.2 WLAN (+ Bluetooth) + * LAN + * USB + * Memory card reader + * CPU fan + * VGA + * Display ports + * Audio (using headphone jack or display) + * COM1 + * TPM + +### Not working + * Audio (internal speaker) + * Microphones + * SATA ACPI issue + * Super I/O not well supported may be minor issues + * Power button LED + * ME cleaner + +These issues are exclusively to Ubuntu LiveCD environment + * PCIe reports many errors + * DRM issue when using EDK 2 and libgfxinit + +### Untested + * COM2 header + * LPT header + * PS/2 keyboard and mouse diff --git a/Documentation/mainboard/lenovo/thinkcentre_m710s_spi_location.jpg b/Documentation/mainboard/lenovo/thinkcentre_m710s_spi_location.jpg new file mode 100644 index 0000000..5995ee8 --- /dev/null +++ b/Documentation/mainboard/lenovo/thinkcentre_m710s_spi_location.jpg Binary files differ