[coreboot-gerrit] Change in coreboot[master]: mainboard/volteer: enable early tcss chrome ec related code in mainboard

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45742 )

Change subject: mainboard/volteer: enable early tcss chrome ec related code in mainboard
......................................................................

Patch Set 5:

(1 comment)

https://review.coreboot.org/c/coreboot/+/45742/5/src/mainboard/google/voltee... 
File src/mainboard/google/volteer/mainboard.c:

https://review.coreboot.org/c/coreboot/+/45742/5/src/mainboard/google/voltee... 
PS5, Line 93: 		//Hard coding these values until the dynamic setting is upstreamed
            : 		if (i == 0) {
            : 			mux_data.usb2_port = 9;
            : 			mux_data.usb3_port = 1;
            : 		} else if (i == 1) {
            : 			mux_data.usb2_port = 4;
            : 			mux_data.usb3_port = 2;
            : 		}
            : 
Here's what I've got right now:
```
diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c
index dc6cbf9f4be0..9b6cde2ab2ec 100644
--- a/src/mainboard/google/volteer/mainboard.c
+++ b/src/mainboard/google/volteer/mainboard.c
@@ -6,6 +6,7 @@
 #include <device/device.h>
 #include <drivers/spi/tpm/tpm.h>
 #include <ec/google/chromeec/ec.h>
+#include <ec/google/chromeec/chip.h>
 #include <ec/ec.h>
 #include <fw_config.h>
 #include <security/tpm/tss.h>
@@ -118,6 +119,33 @@ void mainboard_update_soc_chip_config(struct soc_intel_tigerlake_config *cfg)
        }
 }

+static const struct drivers_intel_pmc_mux_conn_config *get_connector_config(int port)
+{
+       const struct drivers_intel_pmc_mux_conn_config *config;
+       const struct ec_google_chromeec_config *ec_config;
+       const struct device *ec;
+
+       config = NULL;
+
+       /* Find the Chrome EC */
+       ec = dev_find_slot_pnp(0x0c, 0x09);
+       if (!ec)
+               return NULL;
+
+       ec_config = ec->chip_info;
+       if (!ec_config)
+               return NULL;
+
+       if (port >= 0 && port < MAX_TYPEC_PORTS) {
+               const struct device *conn = ec_config->mux_conn[port];
+               if (conn)
+                       config = (const struct drivers_intel_pmc_mux_conn_config *)
+                               conn->chip_info;
+       }
+
+       return config;
+}
+
 void mainboard_early_tcss_enable(void)
 {
        uint8_t dp_mode;
@@ -134,6 +162,7 @@ void mainboard_early_tcss_enable(void)
        for (i = 0; i < num_ports; i++) {
                uint8_t mux_flags;
                struct tcss_mux mux_data;
+               const struct drivers_intel_pmc_mux_conn_config *config;

ret = google_chromeec_usb_get_pd_mux_info(i, &mux_flags);
                if (ret < 0) {
@@ -141,21 +170,18 @@ void mainboard_early_tcss_enable(void)
                        continue;
                }

-               //Hard coding these values until the dynamic setting is upstreamed
-               if (i == 0) {
-                       mux_data.usb2_port = 9;
-                       mux_data.usb3_port = 1;
-               } else if (i == 1) {
-                       mux_data.usb2_port = 4;
-               }
-
                ret = google_chromeec_usb_pd_control(i, &ufp, &acc, &dp_mode);
                if (ret < 0) {
                        printk(BIOS_ERR, "port C%d: pd_control failed\n", i);
                        continue;
                }

+               config = get_connector_config(i);
+               if (config) {
+                       mux_data.usb2_port = config->usb2_port_number;
+                       mux_data.usb3_port = config->usb3_port_number;
+               }
+
                mux_data.usb = !!(mux_flags & USB_PD_MUX_USB_ENABLED);
                mux_data.dp = !!(mux_flags & USB_PD_MUX_DP_ENABLED);
                mux_data.cable = !!(mux_flags & USB_PD_CTRL_ACTIVE_CABLE);

```