[coreboot-gerrit] Change in coreboot[master]: sb/intel/lynxpoint: Correct read width in RMW cycle

[Angel Pons (Code Review)]

Attention is currently required from: Patrick Rudolph.
Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47098

to look at the new patch set (#5).

Change subject: sb/intel/lynxpoint: Correct read width in RMW cycle
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sb/intel/lynxpoint: Correct read width in RMW cycle

The register is 32 bits wide, so do not read 16 bits out of it.
LynxPoint PCH reference code version 1.9.1 always uses 32-bit accesses.

Change-Id: I18fbba0603579417e09ae4eb4eb273f7fcd903fc
Signed-off-by: Angel Pons 
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M src/southbridge/intel/lynxpoint/sata.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/47098/5