[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/xeon_sp/gnr: Support fast boot

[Lean Sheng Tan (Code Review)]

Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82080?usp=email )

Change subject: soc/intel/xeon_sp/gnr: Support fast boot
......................................................................

soc/intel/xeon_sp/gnr: Support fast boot

Fast boot will used pre-saved hardware configuration data to
accelerate the boot process, e.g. DDR training is skipped by using
pre-saved training data. Enable fast boot on cold and warm resets
by default.

Change-Id: Ib5dc76176b16ea1be5dd9b05a375c9179411f590
Signed-off-by: Gang Chen 
Signed-off-by: Shuo Liu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82080
Tested-by: build bot (Jenkins) 
Reviewed-by: Lean Sheng Tan 
---
M src/soc/intel/xeon_sp/config.c
M src/soc/intel/xeon_sp/gnr/romstage.c
M src/soc/intel/xeon_sp/include/soc/config.h
3 files changed, 28 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Lean Sheng Tan: Looks good to me, approved

diff --git a/src/soc/intel/xeon_sp/config.c b/src/soc/intel/xeon_sp/config.c
index c2a908c..a61f724 100644
--- a/src/soc/intel/xeon_sp/config.c
+++ b/src/soc/intel/xeon_sp/config.c
@@ -6,3 +6,8 @@
 {
    return XEONSP_CXL_DISABLED;
 }
+
+__weak enum xeonsp_fast_boot_mode get_fast_boot_mode(void)
+{
+	return XEONSP_FAST_BOOT_COLD | XEONSP_FAST_BOOT_WARM;
+}
diff --git a/src/soc/intel/xeon_sp/gnr/romstage.c b/src/soc/intel/xeon_sp/gnr/romstage.c
index 95b2e15..0c3aed0 100644
--- a/src/soc/intel/xeon_sp/gnr/romstage.c
+++ b/src/soc/intel/xeon_sp/gnr/romstage.c
@@ -1,5 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <console/console.h>
+#include <soc/config.h>
 #include <soc/romstage.h>

static uint8_t get_mmcfg_base_upd_index(const uint64_t base_addr)
@@ -48,6 +50,19 @@
    m_cfg->mmCfgBase = get_mmcfg_base_upd_index(CONFIG_ECAM_MMCONF_BASE_ADDRESS);
    m_cfg->mmCfgSize = get_mmcfg_size_upd_index(CONFIG_ECAM_MMCONF_LENGTH);

+	/* fast boot setting */
+	int fast_boot_mode = get_fast_boot_mode();
+	m_cfg->AttemptFastBoot = !!(fast_boot_mode & XEONSP_FAST_BOOT_WARM);
+	m_cfg->AttemptFastBootCold = !!(fast_boot_mode & XEONSP_FAST_BOOT_COLD);
+
+	FSPM_ARCH2_UPD *arch_upd = &mupd->FspmArchUpd;
+	if (fast_boot_mode == XEONSP_FAST_BOOT_DISABLED) {
+		arch_upd->BootMode =
+			FSP_BOOT_WITH_FULL_CONFIGURATION;
+		printk(BIOS_NOTICE, "Reset BootMode as "
+				"FSP_BOOT_WITH_FULL_CONFIGURATION.\n");
+	}
+
    /* Board level settings */
    mainboard_memory_init_params(mupd);
 }
diff --git a/src/soc/intel/xeon_sp/include/soc/config.h b/src/soc/intel/xeon_sp/include/soc/config.h
index 6d5f3d5..66538f5 100644
--- a/src/soc/intel/xeon_sp/include/soc/config.h
+++ b/src/soc/intel/xeon_sp/include/soc/config.h
@@ -11,4 +11,12 @@

enum xeonsp_cxl_mode get_cxl_mode(void);

+enum xeonsp_fast_boot_mode {
+	XEONSP_FAST_BOOT_DISABLED = 0x0,
+	XEONSP_FAST_BOOT_COLD     = 0x1,
+	XEONSP_FAST_BOOT_WARM     = 0x2,
+};
+
+enum xeonsp_fast_boot_mode get_fast_boot_mode(void);
+
 #endif