Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33040 )
Change subject: sb/intel/bd82x6x: Use common final SPI OPs setup ......................................................................
Patch Set 13:
(4 comments)
https://review.coreboot.org/c/coreboot/+/33040/13/src/mainboard/sapphire/pur... File src/mainboard/sapphire/pureplatinumh61/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33040/13/src/mainboard/sapphire/pur... PS13, Line 58: register "spi.ops" = "{ {0x01, WRITE_NO_ADDR }, nit, no space after opening { but before closing }
https://review.coreboot.org/c/coreboot/+/33040/13/src/southbridge/intel/bd82... File src/southbridge/intel/bd82x6x/lpc.c:
https://review.coreboot.org/c/coreboot/+/33040/13/src/southbridge/intel/bd82... PS13, Line 892: struct device *dev = pcidev_on_root(0x1f, 0); can't this return NULL?
https://review.coreboot.org/c/coreboot/+/33040/13/src/southbridge/intel/bd82... PS13, Line 896: if (config) !config I assume
https://review.coreboot.org/c/coreboot/+/33040/13/src/southbridge/intel/bd82... PS13, Line 900: memcpy(spi_config, &config->spi, sizeof(config->spi)); please always use sizeof() the target (if they are supposed to be equal)