[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Fix IPU and Vtd config

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44627 )

Change subject: soc/intel/tigerlake: Fix IPU and Vtd config
......................................................................

soc/intel/tigerlake: Fix IPU and Vtd config

- FSP enables IPU (Imaging Processing Unit) by default even if its
disabled in devicetree. We need to fill FSP upd based on the device
enablement in devicetree.

- Enable Vtd IPU and IGD settings only if respective IPs are enabled.

BUG=165340186
BRANCH=None
TEST=IPU is disabled and doesn't show in lspci.

Change-Id: Ieff57fb0ebc8522546d6b34da6ca2f2f845bf61d
Signed-off-by: Ravi Sarawadi 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44627
Reviewed-by: Daniel H Kang 
Reviewed-by: John Zhao 
Reviewed-by: Wonkyu Kim 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/tigerlake/romstage/fsp_params.c
1 file changed, 15 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  John Zhao: Looks good to me, approved
  Wonkyu Kim: Looks good to me, approved
  Daniel H Kang: Looks good to me, but someone else must approve

diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c
index acb366b..2ba276d 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params.c
@@ -158,6 +158,10 @@
    memcpy(m_cfg->PchHdaAudioLinkSndwEnable, config->PchHdaAudioLinkSndwEnable,
    		sizeof(m_cfg->PchHdaAudioLinkSndwEnable));

+	/* IPU configuration */
+	dev = pcidev_path_on_root(SA_DEVFN_IPU);
+	m_cfg->SaIpuEnable = is_dev_enabled(dev);
+
    /* Vt-D config */
    cpu_id = cpu_get_cpuid();
    if (cpu_id == CPUID_TIGERLAKE_A0) {
@@ -166,11 +170,18 @@
    } else {
    	/* Enable VT-d support for QS platform */
    	m_cfg->VtdDisable = 0;
-		m_cfg->VtdIgdEnable = 0x1;
-		m_cfg->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS;
-		m_cfg->VtdIpuEnable = 0x1;
-		m_cfg->VtdBaseAddress[1] = IPUVT_BASE_ADDRESS;
    	m_cfg->VtdIopEnable = 0x1;
+
+		if (m_cfg->InternalGfx) {
+			m_cfg->VtdIgdEnable = 0x1;
+			m_cfg->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS;
+		}
+
+		if (m_cfg->SaIpuEnable) {
+			m_cfg->VtdIpuEnable = 0x1;
+			m_cfg->VtdBaseAddress[1] = IPUVT_BASE_ADDRESS;
+		}
+
    	m_cfg->VtdBaseAddress[2] = VTVC0_BASE_ADDRESS;

if (m_cfg->TcssDma0En || m_cfg->TcssDma1En)