Attention is currently required from: Jérémy Compostella, Pranava Y N, Subrata Banik.
Cliff Huang has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/84405?usp=email )
Change subject: mb/google/fatcat: Add GPIO settings ......................................................................
Patch Set 1:
(2 comments)
File src/mainboard/google/fatcat/variants/fatcat/gpio.c:
https://review.coreboot.org/c/coreboot/+/84405/comment/ec410856_b6e05109?usp... : PS1, Line 10: /* GPP_A */
remove such comments from this file. […]
Those GPP group comments are generated from the script.
https://review.coreboot.org/c/coreboot/+/84405/comment/6964670d_f3eb4f47?usp... : PS1, Line 427: /* GPP_A08: X1_PCIE_SLOT_PWR_EN */ : PAD_CFG_GPO(GPP_A08, 0, PLTRST), :
why we are enabling x1 power port here w/o probing the FW config ?
Subrata, we don't use fw_config in early and romstage for our PTL and SoCs in the past. Jemery and I was trying to make the changes and we ran into several issues. There are some common code area that needs time to make it clean as well, as well Can we add a TODO list for using early stage fw_config and we can create a proper separate common code change and MB CLs later on?