Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83985?usp=email )
Change subject: mb/acer/g43t-am3: Remove duplicated files ......................................................................
mb/acer/g43t-am3: Remove duplicated files
With commit 26b1a5f62b ("mb/acer/g43t-am3: Rework mainboard for variant mechanism"), the files related to the G43T-AM3 mainboard were supposed to be moved into its own variant directory. However, it seems it was forgotten to delete the old ones and thus remove the duplicates.
Change-Id: I450fab074621d21e80216e4667eaf2510b0e14ad Signed-off-by: Felix Singer felixsinger@posteo.net Reviewed-on: https://review.coreboot.org/c/coreboot/+/83985 Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Elyes Haouas ehaouas@noos.fr Tested-by: build bot (Jenkins) no-reply@coreboot.org --- D src/mainboard/acer/g43t-am3/acpi/superio.asl D src/mainboard/acer/g43t-am3/data.vbt D src/mainboard/acer/g43t-am3/early_init.c D src/mainboard/acer/g43t-am3/gpio.c 4 files changed, 0 insertions(+), 152 deletions(-)
Approvals: Elyes Haouas: Looks good to me, approved Nico Huber: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/mainboard/acer/g43t-am3/acpi/superio.asl b/src/mainboard/acer/g43t-am3/acpi/superio.asl deleted file mode 100644 index 9f3900b..0000000 --- a/src/mainboard/acer/g43t-am3/acpi/superio.asl +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#undef SUPERIO_DEV -#undef SUPERIO_PNP_BASE -#undef IT8720F_SHOW_SP1 -#undef IT8720F_SHOW_SP2 -#undef IT8720F_SHOW_EC -#undef IT8720F_SHOW_KBCK -#undef IT8720F_SHOW_KBCM -#undef IT8720F_SHOW_GPIO -#undef IT8720F_SHOW_CIR -#define SUPERIO_DEV SIO0 -#define SUPERIO_PNP_BASE 0x2e -#define IT8720F_SHOW_EC 1 -#define IT8720F_SHOW_KBCK 1 -#define IT8720F_SHOW_KBCM 1 -#define IT8720F_SHOW_GPIO 1 -#include <superio/ite/it8720f/acpi/superio.asl> diff --git a/src/mainboard/acer/g43t-am3/data.vbt b/src/mainboard/acer/g43t-am3/data.vbt deleted file mode 100644 index 646adba..0000000 --- a/src/mainboard/acer/g43t-am3/data.vbt +++ /dev/null Binary files differ diff --git a/src/mainboard/acer/g43t-am3/early_init.c b/src/mainboard/acer/g43t-am3/early_init.c deleted file mode 100644 index b34ab46..0000000 --- a/src/mainboard/acer/g43t-am3/early_init.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <bootblock_common.h> -#include <southbridge/intel/i82801jx/i82801jx.h> -#include <northbridge/intel/x4x/x4x.h> -#include <superio/ite/common/ite.h> -#include <superio/ite/it8720f/it8720f.h> - -#define GPIO_DEV PNP_DEV(0x2e, IT8720F_GPIO) - -void bootblock_mainboard_early_init(void) -{ - /* Set up GPIOs on Super I/O. */ - ite_reg_write(GPIO_DEV, 0x25, 0x00); // GPIO set 1 - ite_reg_write(GPIO_DEV, 0x26, 0x0c); // GPIO set 2 - ite_reg_write(GPIO_DEV, 0x27, 0x70); // GPIO set 3 - ite_reg_write(GPIO_DEV, 0x28, 0x40); // GPIO set 4 - ite_reg_write(GPIO_DEV, 0x29, 0x00); // GPIO set 5 - - /* Enable 3VSB during Suspend-to-RAM */ - ite_enable_3vsbsw(GPIO_DEV); - - /* Delay PWROK2 after 3VSBSW# during resume from Suspend-to-RAM */ - ite_delay_pwrgd3(GPIO_DEV); -} - -void mb_get_spd_map(u8 spd_map[4]) -{ - spd_map[0] = 0x50; - spd_map[1] = 0x51; - spd_map[2] = 0x52; - spd_map[3] = 0x53; -} diff --git a/src/mainboard/acer/g43t-am3/gpio.c b/src/mainboard/acer/g43t-am3/gpio.c deleted file mode 100644 index 38239ba..0000000 --- a/src/mainboard/acer/g43t-am3/gpio.c +++ /dev/null @@ -1,101 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <southbridge/intel/common/gpio.h> - -static const struct pch_gpio_set1 pch_gpio_set1_mode = { - .gpio0 = GPIO_MODE_GPIO, - .gpio1 = GPIO_MODE_GPIO, - .gpio6 = GPIO_MODE_GPIO, - .gpio7 = GPIO_MODE_GPIO, - .gpio8 = GPIO_MODE_GPIO, - .gpio9 = GPIO_MODE_GPIO, - .gpio13 = GPIO_MODE_GPIO, - .gpio14 = GPIO_MODE_GPIO, - .gpio17 = GPIO_MODE_GPIO, - .gpio18 = GPIO_MODE_GPIO, - .gpio20 = GPIO_MODE_GPIO, - .gpio27 = GPIO_MODE_GPIO, - .gpio28 = GPIO_MODE_GPIO, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_direction = { - .gpio0 = GPIO_DIR_INPUT, - .gpio1 = GPIO_DIR_INPUT, - .gpio6 = GPIO_DIR_INPUT, - .gpio7 = GPIO_DIR_INPUT, - .gpio8 = GPIO_DIR_INPUT, - .gpio9 = GPIO_DIR_OUTPUT, - .gpio13 = GPIO_DIR_INPUT, - .gpio14 = GPIO_DIR_INPUT, - .gpio17 = GPIO_DIR_INPUT, - .gpio18 = GPIO_DIR_OUTPUT, - .gpio20 = GPIO_DIR_OUTPUT, - .gpio27 = GPIO_DIR_OUTPUT, - .gpio28 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_level = { - .gpio9 = GPIO_LEVEL_HIGH, - .gpio18 = GPIO_LEVEL_HIGH, - .gpio20 = GPIO_LEVEL_LOW, - .gpio27 = GPIO_LEVEL_LOW, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_invert = { - .gpio6 = GPIO_INVERT, - .gpio13 = GPIO_INVERT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_blink = { - .gpio18 = GPIO_BLINK, - -}; - -static const struct pch_gpio_set2 pch_gpio_set2_mode = { - .gpio32 = GPIO_MODE_GPIO, - .gpio33 = GPIO_MODE_GPIO, - .gpio34 = GPIO_MODE_GPIO, - .gpio35 = GPIO_MODE_NATIVE, - .gpio36 = GPIO_MODE_NATIVE, - .gpio37 = GPIO_MODE_NATIVE, - .gpio38 = GPIO_MODE_NATIVE, - .gpio39 = GPIO_MODE_NATIVE, - .gpio48 = GPIO_MODE_NATIVE, - .gpio49 = GPIO_MODE_GPIO, - .gpio56 = GPIO_MODE_GPIO, - .gpio57 = GPIO_MODE_GPIO, - .gpio58 = GPIO_MODE_NATIVE, - .gpio60 = GPIO_MODE_GPIO, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_direction = { - .gpio32 = GPIO_DIR_OUTPUT, - .gpio33 = GPIO_DIR_INPUT, - .gpio34 = GPIO_DIR_INPUT, - .gpio49 = GPIO_DIR_OUTPUT, - .gpio56 = GPIO_DIR_INPUT, - .gpio57 = GPIO_DIR_INPUT, - .gpio60 = GPIO_DIR_OUTPUT, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_level = { - .gpio32 = GPIO_LEVEL_HIGH, - .gpio49 = GPIO_LEVEL_HIGH, - .gpio60 = GPIO_LEVEL_LOW, -}; - -const struct pch_gpio_map mainboard_gpio_map = { - .set1 = { - .mode = &pch_gpio_set1_mode, - .direction = &pch_gpio_set1_direction, - .level = &pch_gpio_set1_level, - .blink = &pch_gpio_set1_blink, - .invert = &pch_gpio_set1_invert, - }, - .set2 = { - .mode = &pch_gpio_set2_mode, - .direction = &pch_gpio_set2_direction, - .level = &pch_gpio_set2_level, - }, - -};