[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/xeon_sp/cpx: Add missing FADT fields

[Patrick Rudolph (Code Review)]

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu.

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85508?usp=email )

Change subject: soc/intel/xeon_sp/cpx: Add missing FADT fields
......................................................................

soc/intel/xeon_sp/cpx: Add missing FADT fields

CPX uses the same PCH as SKX does, thus it has the same ACPI timer
timer and PM2 control fields as SKX.

Copy the code from skx to cpx to reduce code differences. Allows to
merge both codebases into one.

Change-Id: I92fc63a6655fb915b2c06273c3259dddfb93e8bb
Signed-off-by: Patrick Rudolph 
---
M src/soc/intel/xeon_sp/cpx/soc_acpi.c
1 file changed, 16 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/85508/1

diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
index c7edb22..defc69d 100644
--- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
@@ -36,8 +36,22 @@

void soc_fill_fadt(acpi_fadt_t *fadt)
 {
-	/* Clear flags set by common/block/acpi/acpi.c acpi_fill_fadt() */
-	fadt->flags &=  ~(ACPI_FADT_SEALED_CASE | ACPI_FADT_S4_RTC_WAKE);
+	const uint16_t pmbase = ACPI_BASE_ADDRESS;
+
+	/* Fix flags set by common/block/acpi/acpi.c acpi_fill_fadt() */
+	fadt->flags &=  ~(ACPI_FADT_SEALED_CASE);
+	fadt->flags |= ACPI_FADT_SLEEP_TYPE;
+
+	fadt->pm2_cnt_blk = pmbase + PM2_CNT;
+	fadt->pm_tmr_blk = pmbase + PM1_TMR;
+
+	fadt->pm2_cnt_len = 1;
+	fadt->pm_tmr_len = 4;
+
+	fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES;
+
+	/* PM Extended Registers */
+	fill_fadt_extended_pm_io(fadt);
 }

void soc_power_states_generation(int core_id, int cores_per_package)