Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Tim Chu.
Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80087?usp=email )
Change subject: soc/intel/xeon_sp/spr: Create CXL ACPI resources only for IIO stacks connected with CXL cards
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
for SPR, stack0 of each socket (8 lanes) cannot support CXL card (16 lanes) physically, hence is_iio_cxl_stack_res(ri) will always be false for stack0.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/80087?usp=email
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I6c1b1343991bc73d90a433d959f6618bbf59532f
Gerrit-Change-Number: 80087
Gerrit-PatchSet: 1
Gerrit-Owner: Shuo Liu
shuo.liu@intel.com
Gerrit-Reviewer: Arthur Heymans
arthur@aheymans.xyz
Gerrit-Reviewer: Christian Walter
christian.walter@9elements.com
Gerrit-Reviewer: Johnny Lin
Johnny_Lin@wiwynn.com
Gerrit-Reviewer: Tim Chu
Tim.Chu@quantatw.com
Gerrit-CC: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-Attention: Johnny Lin
Johnny_Lin@wiwynn.com
Gerrit-Attention: Christian Walter
christian.walter@9elements.com
Gerrit-Attention: Arthur Heymans
arthur@aheymans.xyz
Gerrit-Attention: Tim Chu
Tim.Chu@quantatw.com
Gerrit-Comment-Date: Fri, 19 Jan 2024 04:53:11 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment