Attention is currently required from: Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun Tuli.
Hello Eric Lai, Jakub Czapiga, Kapil Porwal, Tarun Tuli, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76076?usp=email
to look at the new patch set (#2).
Change subject: mb/google/rex: Avoid LPDDR5/x hang ......................................................................
mb/google/rex: Avoid LPDDR5/x hang
This patch avoids random hang observed on LPDD5/x platforms due to CLK not tuned properly in SAGV point 0, 2133MT/s.
As per Intel doc 769410 the expected work around is to change SAGV point 0 from 2133 G4 to 3200 G4.
BUG=b:287170545 TEST=Able to perform 500 power cycles on google/rex without any hang.
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: I02a9cadc075f396549703d7a008382e76268f865 --- M src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/76076/2