Attention is currently required from: Karthik Ramasubramanian. Stanley Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56858 )
Change subject: mb/google/dedede: add gooey variant ......................................................................
Patch Set 8:
(4 comments)
This change is ready for review.
File src/mainboard/google/dedede/variants/gooey/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/56858/comment/3b652a5c_af09769e PS3, Line 11: #| I2C5 | P-Sensor |
Nit: Please fix the indentation.
Done
https://review.coreboot.org/c/coreboot/+/56858/comment/0b537216_5ae23950 PS3, Line 18: .scl_lcnt = 190, : .scl_hcnt = 100, : .sda_hold = 40,
Coreboot recommendation is to configure rise_time_ns and fall_time_ns. […]
The proto phase of Gooey project for debug and test from 8/23, and Gooey motherboard just shipment from factory side. We will update I2C rise_time_ns and fall_time_ns after EE tuning in proto/EVT phase. Could you approve if we update the item in next CL?
https://review.coreboot.org/c/coreboot/+/56858/comment/517fb1db_ae940815 PS3, Line 68:
register "SerialIoGSpiMode[PchSerialIoIndexGSPI0]" = "PchSerialIoDisabled" # Disable GSPI0 […]
Done
https://review.coreboot.org/c/coreboot/+/56858/comment/38d96348_fa0848e1 PS3, Line 334: end # PCH eSPI
Disable GSPI 0
Done