[coreboot-gerrit] Change in coreboot[master]: soc/mediatek: Add chip config for setting PCIe controller data

[Jianjun Wang (Code Review)]

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Yu-Ping Wu.
Hello Hung-Te Lin, Rex-BC Chen, Yu-Ping Wu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/62791

to look at the new patch set (#2).

Change subject: soc/mediatek: Add chip config for setting PCIe controller data
......................................................................

soc/mediatek: Add chip config for setting PCIe controller data

Add chip config for setting PCIe controller data.

TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
 == NVME IDENTIFY CONTROLLER DATA ==
    PCI VID   : 0x15b7
    PCI SSVID : 0x15b7
    SN        : 21517J440114
    MN        : WDC PC SN530 SDBPTPZ-256G-1006
    RAB       : 0x4
    AERL      : 0x7
    SQES      : 0x66
    CQES      : 0x44
    NN        : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006

BUG=b:178565024

Signed-off-by: Jianjun Wang 
Change-Id: Icff83f2a9f76862065987a74cfcc7e511be80a20
---
M src/soc/mediatek/common/include/soc/pcie_common.h
M src/soc/mediatek/common/pcie.c
A src/soc/mediatek/mt8195/chip.h
M src/soc/mediatek/mt8195/include/soc/pcie.h
A src/soc/mediatek/mt8195/include/soc/soc_chip.h
M src/soc/mediatek/mt8195/pcie.c
6 files changed, 78 insertions(+), 90 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/62791/2