Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46556 )
Change subject: sec/intel/txt: Update TXT HEAP and SINIT size ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46556/12/src/security/intel/txt/ram... File src/security/intel/txt/ramstage.c:
https://review.coreboot.org/c/coreboot/+/46556/12/src/security/intel/txt/ram... PS12, Line 306: define HEAP_SIZE (1 * MiB) : /* Recent SINIT ACM (COOPERLAKE_SP) are 256KiB but also need 64KiB data size */ : #define SINIT_SIZE ((256 + 64) * KiB) Is this something that we should handle on the SoC level?
I don't think that hardcoded values make sense here if they differ throughout the platforms.