[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/xeon_sp/gnr: Use default DCACHE_BSP_STACK_SIZE

[Lean Sheng Tan (Code Review)]

Attention is currently required from: Alicja Michalska, Arthur Heymans, Chen, Gang C, Christian Walter, Johnny Lin, Jonathan Zhang, Patrick Rudolph, Shuo Liu, Tim Chu.

Lean Sheng Tan has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/84302?usp=email )

Change subject: soc/intel/xeon_sp/gnr: Use default DCACHE_BSP_STACK_SIZE
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Patch Set 1: Code-Review+2