Tobias Diedrich has posted comments on this change. ( https://review.coreboot.org/22776 )
Change subject: intel/sandybridge: Make timC training more robust. ......................................................................
Patch Set 1:
From the training log output with my DDR3-1333 1.5 RAM:
threshold=2001 min=2 max=4000 timC: 0, 0, 0: 0x02-0x1f-0x3d threshold=2000 min=0 max=4000 timC: 0, 0, 1: 0x00-0x1c-0x39 threshold=2001 min=2 max=4000 timC: 0, 0, 2: 0x1e-0x38-0x53 threshold=2000 min=0 max=4000 timC: 0, 0, 3: 0x25-0x42-0x60 threshold=2000 min=0 max=4000 timC: 0, 0, 4: 0x35-0x53-0x71 threshold=2000 min=0 max=4000 timC: 0, 0, 5: 0x3c-0x5a-0x78 threshold=2000 min=0 max=4000 timC: 0, 0, 6: 0x22-0x40-0x5e threshold=2000 min=0 max=4000 timC: 0, 0, 7: 0x0b-0x28-0x45 threshold=2995 min=1991 max=4000 timC: 0, 1, 0: 0x02-0x1f-0x3d threshold=2000 min=0 max=4000 timC: 0, 1, 1: 0x01-0x1d-0x3a threshold=2225 min=451 max=4000 timC: 0, 1, 2: 0x22-0x3d-0x58 threshold=2000 min=0 max=4000 timC: 0, 1, 3: 0x29-0x45-0x61 threshold=2000 min=0 max=4000 timC: 0, 1, 4: 0x39-0x56-0x73 threshold=2000 min=0 max=4000 timC: 0, 1, 5: 0x7e-0x1b-0x39 threshold=2000 min=0 max=4000 timC: 0, 1, 6: 0x22-0x3f-0x5c threshold=2000 min=0 max=4000 timC: 0, 1, 7: 0x0b-0x27-0x44