Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76718?usp=email )
Change subject: Revert "util/amdfwtool: Add some PSP entries to both levels" ......................................................................
Revert "util/amdfwtool: Add some PSP entries to both levels"
This reverts commit 91f5da477677cc6a7a7d5cdc50f5d2bf71981e44.
Commit breaks booting on MDN (and likely others). Boot hangs on: [NOTE ] MRC: no data in 'RW_MRC_CACHE'
Change-Id: Id8042690af2764d6e46fe01287be598091b1a239 Signed-off-by: Matt DeVillier matt.devillier@amd.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/76718 Reviewed-by: Martin Roth martin.roth@amd.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Varshit Pandya pandyavarshit@gmail.com Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M util/amdfwtool/amdfwtool.c 1 file changed, 5 insertions(+), 5 deletions(-)
Approvals: Felix Held: Looks good to me, approved Varshit Pandya: Looks good to me, approved Martin Roth: Looks good to me, approved build bot (Jenkins): Verified Eric Lai: Looks good to me, approved
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index c821c83..1b2b005 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -244,7 +244,7 @@
amd_fw_entry amd_psp_fw_table[] = { { .type = AMD_FW_PSP_PUBKEY, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true }, - { .type = AMD_FW_PSP_BOOTLOADER, .level = PSP_BOTH | PSP_BOTH_AB, + { .type = AMD_FW_PSP_BOOTLOADER, .level = PSP_BOTH | PSP_LVL2_AB, .generate_manifest = true }, { .type = AMD_FW_PSP_SECURED_OS, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_RECOVERY, .level = PSP_LVL1 }, @@ -257,17 +257,17 @@ { .type = AMD_FW_PSP_SECURED_DEBUG, .level = PSP_LVL2 | PSP_LVL2_AB, .skip_hashing = true }, { .type = AMD_FW_ABL_PUBKEY, .level = PSP_BOTH | PSP_BOTH_AB }, - { .type = AMD_PSP_FUSE_CHAIN, .level = PSP_BOTH | PSP_BOTH_AB }, + { .type = AMD_PSP_FUSE_CHAIN, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_TRUSTLETS, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_TRUSTLETKEY, .level = PSP_LVL2 | PSP_LVL2_AB }, - { .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 0, .level = PSP_BOTH | PSP_LVL2_AB }, + { .type = AMD_FW_PSP_SMU_FIRMWARE2, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 1, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_PSP_SMU_FIRMWARE2, .subprog = 2, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_BOOT_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_SOC_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_DEBUG_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_INTERFACE_DRIVER, .level = PSP_BOTH | PSP_LVL2_AB }, - { .type = AMD_DEBUG_UNLOCK, .level = PSP_BOTH | PSP_BOTH_AB }, + { .type = AMD_DEBUG_UNLOCK, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_HW_IPCFG, .subprog = 0, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_HW_IPCFG, .subprog = 1, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_WRAPPED_IKEK, .level = PSP_BOTH | PSP_LVL2_AB, .skip_hashing = true }, @@ -306,7 +306,7 @@ { .type = AMD_FW_PSP_VERSTAGE, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_FW_VERSTAGE_SIG, .level = PSP_BOTH | PSP_LVL2_AB }, { .type = AMD_RPMC_NVRAM, .level = PSP_LVL2 | PSP_LVL2_AB }, - { .type = AMD_FW_SPL, .level = PSP_BOTH | PSP_BOTH_AB }, + { .type = AMD_FW_SPL, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_MSMU, .level = PSP_LVL2 | PSP_LVL2_AB },