Nathaniel Roach has uploaded this change for review. ( https://review.coreboot.org/21465
Change subject: sb/intel/bd82x6x: Add Timestamp around ME DRAM update ......................................................................
sb/intel/bd82x6x: Add Timestamp around ME DRAM update
Add a timestamp before and after waiting for the ME to acknowledge the DRAM being ready.
This allows easier debugging during use of me_cleaner and/or alternate ME images.
Change-Id: Ie228e12a75d373b4f406b3595e1fb1aab41aa5df Signed-off-by: Nathaniel Roach nroach44@gmail.com --- M src/commonlib/include/commonlib/timestamp_serialized.h M src/southbridge/intel/bd82x6x/early_me.c 2 files changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/21465/1
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index 60feffe..d9784d1 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -77,6 +77,10 @@ TS_END_COPYVPD_RO = 551, TS_END_COPYVPD_RW = 552,
+ /* 940-950 reserved for vendorcode extensions (940-950: intel/ME) */ + TS_ME_INFORM_DRAM_WAIT = 940, + TS_ME_INFORM_DRAM_DONE = 941, + /* 950+ reserved for vendorcode extensions (950-999: intel/fsp) */ TS_FSP_MEMORY_INIT_START = 950, TS_FSP_MEMORY_INIT_END = 951, @@ -177,6 +181,10 @@ { TS_KERNEL_DECOMPRESSION, "starting kernel decompression/relocation" }, { TS_START_KERNEL, "jumping to kernel" },
+ /* Intel ME related timestamps */ + { TS_ME_INFORM_DRAM_WAIT, "waiting for ME acknowledgement of raminit"}, + { TS_ME_INFORM_DRAM_DONE, "finished waiting for ME response"}, + /* FSP related timestamps */ { TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" }, { TS_FSP_MEMORY_INIT_END, "returning from FspMemoryInit" }, diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c index 607cd14..b2e9200 100644 --- a/src/southbridge/intel/bd82x6x/early_me.c +++ b/src/southbridge/intel/bd82x6x/early_me.c @@ -20,6 +20,7 @@ #include <device/pci_ids.h> #include <halt.h> #include <string.h> +#include <timestamp.h> #include "me.h" #include "pch.h"
@@ -190,6 +191,7 @@ meDID = did.uma_base | (1 << 28);// | (1 << 23); pci_write_config32(PCI_DEV(0, 0x16, 0), PCI_ME_H_GS, meDID);
+ timestamp_add_now(TS_ME_INFORM_DRAM_WAIT); udelay(1100);
/* Must wait for ME acknowledgement */ @@ -200,6 +202,7 @@ hfs = (pci_read_config32(PCI_DEV(0, 0x16, 0), PCI_ME_HFS) & 0xfe000000) >> 24; millisec++; } + timestamp_add_now(TS_ME_INFORM_DRAM_DONE);
me_fws2 = pci_read_config32(PCI_DEV(0, 0x16, 0), 0x48); printk(BIOS_NOTICE, "ME: FWS2: 0x%x\n", me_fws2);