[coreboot-gerrit] [S] Change in coreboot[main]: soc/amd/glinda: Update SCI mapping

[Maximilian Brune (Code Review)]

Attention is currently required from: Felix Held.

Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/84381?usp=email )

Change subject: soc/amd/glinda: Update SCI mapping
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Patch Set 1:

(1 comment)

File src/soc/amd/glinda/include/soc/pci_devs.h:

https://review.coreboot.org/c/coreboot/+/84381/comment/c063d26b_f252a49b?usp... :
PS1, Line 68: #define   XHCI0_DEV		0x0
            : #define   XHCI0_FUNC		0
            : #define   XHCI0_DEVFN		PCI_DEVFN(XHCI0_DEV, XHCI0_FUNC)
> this one should be moved below the correct internal bus C

Done