Ben Chuang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43751 )
Change subject: drivers/generic/genesyslogic: Add driver for Genesys Loigc GL9763E ......................................................................
drivers/generic/genesyslogic: Add driver for Genesys Loigc GL9763E
Set single request AXI, disable ASPM L0s and enable SSC.
Signed-off-by: Ben Chuang benchuanggli@gmail.com Change-Id: I158c79f5ac6e559f335b6b50092469c7b1646c56 --- A src/drivers/generic/genesyslogic/Kconfig A src/drivers/generic/genesyslogic/Makefile.inc A src/drivers/generic/genesyslogic/gli9763e.c A src/drivers/generic/genesyslogic/gli9763e.h 4 files changed, 118 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/43751/1
diff --git a/src/drivers/generic/genesyslogic/Kconfig b/src/drivers/generic/genesyslogic/Kconfig new file mode 100644 index 0000000..e215cfa --- /dev/null +++ b/src/drivers/generic/genesyslogic/Kconfig @@ -0,0 +1,2 @@ +config DRIVERS_GENERIC_GLI9763E + bool diff --git a/src/drivers/generic/genesyslogic/Makefile.inc b/src/drivers/generic/genesyslogic/Makefile.inc new file mode 100644 index 0000000..9f5a2eb --- /dev/null +++ b/src/drivers/generic/genesyslogic/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_GENERIC_GLI9763E) += gli9763e.c diff --git a/src/drivers/generic/genesyslogic/gli9763e.c b/src/drivers/generic/genesyslogic/gli9763e.c new file mode 100644 index 0000000..66b0af5 --- /dev/null +++ b/src/drivers/generic/genesyslogic/gli9763e.c @@ -0,0 +1,87 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* Driver for GenesysLogic 9763E */ + +#include <console/console.h> +#include <device/device.h> +#include <device/path.h> +#include <device/pci.h> +#include <device/pci_ops.h> +#include <device/pci_ids.h> +#include "gli9763e.h" + +static inline int pci_read_config_dword(struct device *dev, int where, + u32 *val) +{ + *val = pci_read_config32(dev, where); + return 0; +} + +static inline int pci_write_config_dword(struct device *dev, int where, + u32 val) +{ + pci_write_config32(dev, where, val); + return 0; +} + +static void gli_set_gl9763e(struct device *pdev) +{ + u32 value; + + pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value); + value &= ~GLI_9763E_VHS_REV; + value |= ((u32)GLI_9763E_VHS_REV_W << GLI_9763E_VHS_REV_SHIFT); + pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value); + + pci_read_config_dword(pdev, PCIE_GLI_9763E_SCR, &value); + value |= GLI_9763E_SCR_AXI_REQ; + pci_write_config_dword(pdev, PCIE_GLI_9763E_SCR, value); + + pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG_REG_2, &value); + value &= ~GLI_9763E_CFG_REG_2_L0S; + pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG_REG_2, value); + + pci_read_config_dword(pdev, PCIE_GLI_9763E_PLL_CTL_2, &value); + value &= ~GLI_9763E_PLL_CTL_2_MAX_SSC; + value |= ((u32)MAX_SSC_30000PPM << GLI_9763E_PLL_CTL_2_MAX_SSC_SHIFT); + pci_write_config_dword(pdev, PCIE_GLI_9763E_PLL_CTL_2, value); + + pci_read_config_dword(pdev, PCIE_GLI_9763E_PLL_CTL, &value); + value |= GLI_9763E_PLL_CTL_SSC; + pci_write_config_dword(pdev, PCIE_GLI_9763E_PLL_CTL, value); + + pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value); + value &= ~GLI_9763E_VHS_REV; + value |= ((u32)GLI_9763E_VHS_REV_R << GLI_9763E_VHS_REV_SHIFT); + pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value); +} + +static void gli9763e_init(struct device *dev) +{ + printk(BIOS_INFO, "GL9763E: init\n"); + pci_dev_init(dev); + gli_set_gl9763e(dev); +} + +static struct device_operations gli9763e_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .ops_pci = &pci_dev_ops_pci, + .init = gli9763e_init, +}; + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_GLI_9763E, + 0 +}; + +static const struct pci_driver genesyslogic_gli9763e __pci_driver = { + .ops = &gli9763e_ops, + .vendor = PCI_VENDOR_ID_GLI, + .devices = pci_device_ids, +}; + +struct chip_operations drivers_generic_genesyslogic_ops = { + CHIP_NAME("Genesys Logic GL9763E") +}; diff --git a/src/drivers/generic/genesyslogic/gli9763e.h b/src/drivers/generic/genesyslogic/gli9763e.h new file mode 100644 index 0000000..586870f --- /dev/null +++ b/src/drivers/generic/genesyslogic/gli9763e.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* Driver for GenesysLogic 9763E */ + +#include <types.h> + +#define PCI_VENDOR_ID_GLI 0x17a0 +#define PCI_DEVICE_ID_GLI_9763E 0xe763 + +#define PCIE_GLI_9763E_VHS 0x884 +#define GLI_9763E_VHS_REV 0xF00 +#define GLI_9763E_VHS_REV_SHIFT 16 +#define GLI_9763E_VHS_REV_R 0x0 +#define GLI_9763E_VHS_REV_M 0x1 +#define GLI_9763E_VHS_REV_W 0x2 +#define PCIE_GLI_9763E_SCR 0x8E0 +#define GLI_9763E_SCR_AXI_REQ BIT(9) + +#define PCIE_GLI_9763E_CFG_REG_2 0x8A4 +#define GLI_9763E_CFG_REG_2_L0S BIT(11) + +#define PCIE_GLI_9763E_PLL_CTL 0x938 +#define GLI_9763E_PLL_CTL_SSC BIT(19) + +#define PCIE_GLI_9763E_PLL_CTL_2 0x93C +#define GLI_9763E_PLL_CTL_2_MAX_SSC 0xFFFF0000 +#define GLI_9763E_PLL_CTL_2_MAX_SSC_SHIFT 16 +#define MAX_SSC_30000PPM 0xF5C3