Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42633 )
Change subject: sb/intel/i82801ix: Rename i82801ix_lpc_decode() ......................................................................
sb/intel/i82801ix: Rename i82801ix_lpc_decode()
For consistency with other Intel southbridges, we rename this function to `i82801ix_lpc_setup`.
Tested with BUILD_TIMELESS=1, Roda RK9 does not change.
Change-Id: Id8b3bcc9174277e085868866a1b5d90b5c51201a Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/i82801ix/bootblock.c M src/southbridge/intel/i82801ix/early_init.c M src/southbridge/intel/i82801ix/i82801ix.h 3 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/42633/1
diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c index b7461bb..479c588 100644 --- a/src/southbridge/intel/i82801ix/bootblock.c +++ b/src/southbridge/intel/i82801ix/bootblock.c @@ -14,5 +14,5 @@ enable_spi_prefetch();
i82801ix_early_init(); - i82801ix_lpc_decode(); + i82801ix_lpc_setup(); } diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c index 18fe38b..9fe87ce 100644 --- a/src/southbridge/intel/i82801ix/early_init.c +++ b/src/southbridge/intel/i82801ix/early_init.c @@ -51,7 +51,7 @@ before they get cleared. */ }
-void i82801ix_lpc_decode(void) +void i82801ix_lpc_setup(void) { const pci_devfn_t d31f0 = PCI_DEV(0, 0x1f, 0); const struct device *dev = pcidev_on_root(0x1f, 0); diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index d7cfc4d..6ac0361 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -194,7 +194,7 @@ void aseg_smm_lock(void);
void i82801ix_early_init(void); -void i82801ix_lpc_decode(void); +void i82801ix_lpc_setup(void); void i82801ix_dmi_setup(void); void i82801ix_dmi_poll_vc1(void);