Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81628?usp=email )
Change subject: soc/intel/xeon_sp: Use default soc_get_ioapic_info ......................................................................
soc/intel/xeon_sp: Use default soc_get_ioapic_info
intel/common/block/acpi provides default soc_get_ioapic_info for single IOAPIC model. Use the default soc_get_ioapic_info when XEON_SP_HAVE_IIO_IOAPIC is not set. This model fits for SPR and later.
TEST=Build and boot on intel/archercity CRB
Change-Id: I1ecfba49cd9b4dfbb3f11d58d04d07ea1752a131 Signed-off-by: Shuo Liu shuo.liu@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/81628 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Varshit Pandya pandyavarshit@gmail.com Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/xeon_sp/acpi.c 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Varshit Pandya: Looks good to me, approved
diff --git a/src/soc/intel/xeon_sp/acpi.c b/src/soc/intel/xeon_sp/acpi.c index de63ced..9ee8d6a 100644 --- a/src/soc/intel/xeon_sp/acpi.c +++ b/src/soc/intel/xeon_sp/acpi.c @@ -90,6 +90,7 @@ return map; }
+#if CONFIG(XEON_SP_HAVE_IIO_IOAPIC) static uintptr_t xeonsp_ioapic_bases[CONFIG(XEON_SP_HAVE_IIO_IOAPIC) * 8 + 1];
size_t soc_get_ioapic_info(const uintptr_t *ioapic_bases[]) @@ -126,6 +127,7 @@
return index; } +#endif
void iio_domain_set_acpi_name(struct device *dev, const char *prefix) {