Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42462 )
Change subject: soc/intel/jasperlake: set SerialIoUartDebugMode to skip Uart Init ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42462/4/src/soc/intel/jasperlake/ro... File src/soc/intel/jasperlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/42462/4/src/soc/intel/jasperlake/ro... PS4, Line 84: SerialIoUartDebugMode I believe FSP has been initializing the debug UART in its current form. If so, what is the impact?