[coreboot-gerrit] Change in coreboot[master]: arch/x86: Add postcar_frame_common_mtrrs()

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34809 )

Change subject: arch/x86: Add postcar_frame_common_mtrrs()
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/34809/2/src/arch/x86/postcar_loader... 
File src/arch/x86/postcar_loader.c:

https://review.coreboot.org/c/coreboot/+/34809/2/src/arch/x86/postcar_loader... 
PS2, Line 125: 	/* Cache RAM as WB from 0 -> CACHE_TMP_RAMTOP. */
CACHE_TMP_RAMTOP is fairly arbitrary. Why would we do this all the time?