[coreboot-gerrit] Change in coreboot[master]: sc7180: clock: Add support to bump CPU levels

[Julius Werner (Code Review)]

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39234 )

Change subject: sc7180: clock: Add support to bump CPU levels
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39234/1/src/soc/qualcomm/sc7180/clo... 
File src/soc/qualcomm/sc7180/clock.c:

https://review.coreboot.org/c/coreboot/+/39234/1/src/soc/qualcomm/sc7180/clo... 
PS1, Line 314: 		udelay(1);
> Sure, I could make it counter based.

Please use the wait_us() helper from <timer.h>, e.g.

if (!wait_us(100, read32(&apss->pll.mode) & LOCK_DET_BMSK)) {
   printk(BIOS_ERR, "ERROR: %p PLL did not lock!);
   return;
 }

(This is assuming 100us are enough to lock the PLL in all cases... please choose the appropriate value. You can use wait_ms() for milliseconds.)