Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46953 )
Change subject: soc/intel/broadwell: Select CPU_INTEL_HASWELL ......................................................................
soc/intel/broadwell: Select CPU_INTEL_HASWELL
This allows us to drop many now-redundant Kconfig options.
Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical. The default configuration file also remains identical, as expected.
Change-Id: I20b0200550508679bf2533342ce918b221dcf81e Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46953 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/google/auron/Kconfig M src/mainboard/google/jecht/Kconfig M src/mainboard/intel/wtm2/Kconfig M src/mainboard/purism/librem_bdw/Kconfig M src/soc/intel/broadwell/Kconfig 5 files changed, 2 insertions(+), 30 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig index 293a973..5301e32 100644 --- a/src/mainboard/google/auron/Kconfig +++ b/src/mainboard/google/auron/Kconfig @@ -1,7 +1,6 @@
config BOARD_GOOGLE_BASEBOARD_AURON def_bool n - select CPU_INTEL_HASWELL select SOC_INTEL_BROADWELL select BOARD_ROMSIZE_KB_8192 select EC_GOOGLE_CHROMEEC diff --git a/src/mainboard/google/jecht/Kconfig b/src/mainboard/google/jecht/Kconfig index 1ffc456..b04cc46 100644 --- a/src/mainboard/google/jecht/Kconfig +++ b/src/mainboard/google/jecht/Kconfig @@ -1,6 +1,5 @@ config BOARD_GOOGLE_BASEBOARD_JECHT def_bool n - select CPU_INTEL_HASWELL select SOC_INTEL_BROADWELL select BOARD_ROMSIZE_KB_8192 select SUPERIO_ITE_IT8772F diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig index 7cb9e1c..7ac5f1c 100644 --- a/src/mainboard/intel/wtm2/Kconfig +++ b/src/mainboard/intel/wtm2/Kconfig @@ -2,7 +2,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select CPU_INTEL_HASWELL select SOC_INTEL_BROADWELL select BOARD_ROMSIZE_KB_8192 select HAVE_ACPI_TABLES diff --git a/src/mainboard/purism/librem_bdw/Kconfig b/src/mainboard/purism/librem_bdw/Kconfig index 481909b..ad764b7 100644 --- a/src/mainboard/purism/librem_bdw/Kconfig +++ b/src/mainboard/purism/librem_bdw/Kconfig @@ -1,6 +1,5 @@ config BOARD_PURISM_BASEBOARD_LIBREM_BDW def_bool n - select CPU_INTEL_HASWELL select SYSTEM_TYPE_LAPTOP select BOARD_ROMSIZE_KB_8192 select HAVE_ACPI_RESUME diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 7f27026..14bbb81 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -12,14 +12,10 @@ config SOC_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 - select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS + select CPU_INTEL_HASWELL select MRC_SETTINGS_PROTECT - select CPU_INTEL_COMMON - select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS select SOUTHBRIDGE_INTEL_COMMON_RESET @@ -28,14 +24,10 @@ select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 select HAVE_USBDEBUG select IOAPIC + select INTEL_LYNXPOINT_LP select REG_SCRIPT - select PARALLEL_MP select RTC select SPI_FLASH - select SSE2 - select TSC_SYNC_MFENCE - select UDELAY_TSC - select TSC_MONOTONIC_TIMER select SOC_INTEL_COMMON select INTEL_DESCRIPTOR_MODE_CAPABLE select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT @@ -43,10 +35,6 @@ select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
-config MAX_CPUS - int - default 8 - config PCIEXP_ASPM bool default y @@ -91,18 +79,6 @@ hex default 0xf0000000
-config SMM_TSEG_SIZE - hex - default 0x800000 - -config IED_REGION_SIZE - hex - default 0x400000 - -config SMM_RESERVED_SIZE - hex - default 0x100000 - config VGA_BIOS_ID string default "8086,0406"