HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40430 )
Change subject: src/soc/{mediatek,nvidia}: Drop duplicated branches ......................................................................
src/soc/{mediatek,nvidia}: Drop duplicated branches
Duplicated branches found using '-Wduplicated-branches' warning option.
Change-Id: I30af5191b924666f29b8fcfc7a7478a50e5a6084 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c M src/soc/nvidia/tegra124/sor.c 2 files changed, 7 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/40430/1
diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c index 40500a4..5e6a63d 100644 --- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c +++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c @@ -989,11 +989,7 @@ fail_bit = err_value & ((u32)1 << bit); dramk_check_dq_win(&(dqdqs_perbit_dly[bit]), dly, MAX_DQDLY_TAPS - 1, fail_bit); - if (fail_bit == 0) { - dramc_dbg_msg("o"); - } else { - dramc_dbg_msg("x"); - } + dramc_dbg_msg((fail_bit == 0) ? "o" : "x"); } dramc_dbg_msg("\n"); } @@ -1025,11 +1021,7 @@ fail_bit = err_value & ((u32)1 << bit); dramk_check_dqs_win(&(dqdqs_perbit_dly[bit]), dly, max_dqs_taps - 1, fail_bit); - if (fail_bit == 0) { - dramc_dbg_msg("o"); - } else { - dramc_dbg_msg("x"); - } + dramc_dbg_msg((fail_bit == 0) ? "o" : "x"); } dramc_dbg_msg("\n"); } diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c index a702eaa..a69b92b 100644 --- a/src/soc/nvidia/tegra124/sor.c +++ b/src/soc/nvidia/tegra124/sor.c @@ -250,10 +250,11 @@
reg_val = tegra_sor_readl(sor, NV_SOR_DP_PADCTL(sor->portnum));
- if (power_up) - reg_val |= NV_SOR_DP_PADCTL_PAD_CAL_PD_POWERUP; - else - reg_val &= ~NV_SOR_DP_PADCTL_PAD_CAL_PD_POWERUP; + /* FIXME: reg_val |= (0 << 23) and reg_val &= ~(0 <<23) will change nothing */ + //if (power_up) + // reg_val |= NV_SOR_DP_PADCTL_PAD_CAL_PD_POWERUP; + //else + // reg_val &= ~NV_SOR_DP_PADCTL_PAD_CAL_PD_POWERUP;
tegra_sor_writel(sor, NV_SOR_DP_PADCTL(sor->portnum), reg_val); }