Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52802 )
Change subject: mb/google/mancomb: Fix S0i3/S3 GPIO configuration ......................................................................
mb/google/mancomb: Fix S0i3/S3 GPIO configuration
Using PAD_WAKE is actually wrong. The wake bits are only supposed to be set when using the GPIO controller to wake the system. coreboot's current architecture relies on using GPEs to wake the system.
BUG=b:186011392 TEST=none
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ib956fc299fe21cd7ea0b465cbdc5c8da830a668d Reviewed-on: https://review.coreboot.org/c/coreboot/+/52802 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: EricR Lai ericr_lai@compal.corp-partner.google.com --- M src/mainboard/google/mancomb/variants/baseboard/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified EricR Lai: Looks good to me, approved
diff --git a/src/mainboard/google/mancomb/variants/baseboard/gpio.c b/src/mainboard/google/mancomb/variants/baseboard/gpio.c index a9346a3..f829117 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/gpio.c +++ b/src/mainboard/google/mancomb/variants/baseboard/gpio.c @@ -47,7 +47,7 @@ /* AGPIO21 */ PAD_NC(GPIO_21), /* EC_SOC_WAKE_ODL */ - PAD_WAKE(GPIO_22, PULL_NONE, EDGE_LOW, S0i3), + PAD_SCI(GPIO_22, PULL_NONE, EDGE_LOW), /* AC_PRES */ PAD_NF(GPIO_23, AC_PRES, PULL_UP), /* HUB_RST_L */