[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Add DDR mode register init

[Yu-Ping Wu (Code Review)]

Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44711 )

Change subject: soc/mediatek/mt8192: Add DDR mode register init
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Patch Set 50:

(3 comments)

https://review.coreboot.org/c/coreboot/+/44711/50/src/soc/mediatek/mt8192/dr... 
File src/soc/mediatek/mt8192/dramc_dvfs.c:

https://review.coreboot.org/c/coreboot/+/44711/50/src/soc/mediatek/mt8192/dr... 
PS50, Line 23:  = 0
No need to initialize. Or we may write:

u8 tmp_level = (shu_level == DRAM_DFS_SHU0) ? shu_level : 1;

https://review.coreboot.org/c/coreboot/+/44711/50/src/soc/mediatek/mt8192/dr... 
PS50, Line 85: wait shu_en ack.
Waiting shu_en ack

Note that:
1. "Waiting" is capitalized
2. No trailing period

https://review.coreboot.org/c/coreboot/+/44711/50/src/soc/mediatek/mt8192/dr... 
PS50, Line 102: complete
completed