Attention is currently required from: Nico Huber.
Angel Pons has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/82769?usp=email )
Change subject: nb/via/cx700: Implement FSB tuning ......................................................................
Patch Set 2: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82769/comment/2353a83b_d912b188?usp... : PS2, Line 17: seems unclear if it was put there intentionally. If this soft reset doesn't clear the FSB settings, I imagine it's to help commit the settings. I've seen similar stuff for Intel QPI.
File src/northbridge/via/cx700/romstage.c:
https://review.coreboot.org/c/coreboot/+/82769/comment/723c1aae_fbd6b196?usp... : PS2, Line 47: pci_write_config8(_sdev_host_ctrl, 0x4f, 0x01); Wasn't there one of these in bootblock? Or does it need to be done again?