[coreboot-gerrit] Change in coreboot[master]: mb/intel/dcp847ske: Do not overwrite pei_data

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43033 )

Change subject: mb/intel/dcp847ske: Do not overwrite pei_data
......................................................................

mb/intel/dcp847ske: Do not overwrite pei_data

Most of the values are already set in northbridge code.

Change-Id: Ib865eee601fef52b5bed9c31bcf2404d161445f2
Signed-off-by: Angel Pons 
---
M src/mainboard/intel/dcp847ske/romstage.c
1 file changed, 5 insertions(+), 30 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/43033/1

diff --git a/src/mainboard/intel/dcp847ske/romstage.c b/src/mainboard/intel/dcp847ske/romstage.c
index e81b4b6..72c869d 100644
--- a/src/mainboard/intel/dcp847ske/romstage.c
+++ b/src/mainboard/intel/dcp847ske/romstage.c
@@ -12,39 +12,14 @@
 #if !CONFIG(USE_NATIVE_RAMINIT)
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	struct pei_data pei_data_template = {
-		.pei_version = PEI_VERSION,
-		.mchbar = (uintptr_t)DEFAULT_MCHBAR,
-		.dmibar = (uintptr_t)DEFAULT_DMIBAR,
-		.epbar = DEFAULT_EPBAR,
-		.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
-		.smbusbar = SMBUS_IO_BASE,
-		.wdbbar = 0x4000000,
-		.wdbsize = 0x1000,
-		.hpet_address = CONFIG_HPET_ADDRESS,
-		.rcba = (uintptr_t)DEFAULT_RCBABASE,
-		.pmbase = DEFAULT_PMBASE,
-		.gpiobase = DEFAULT_GPIOBASE,
-		.thermalbase = 0xfed08000,
-		.system_type = 0, // 0 Mobile, 1 Desktop/Server
-		.tseg_size = CONFIG_SMM_TSEG_SIZE,
-		.spd_addresses = { 0xa0, 0x00, 0xa2, 0x00 },
-		.ts_addresses = { 0x00, 0x00, 0x00, 0x00 },
-		.ec_present = 0,
-		.gbe_enable = 1,
-		// 0 = leave channel enabled
-		// 1 = disable dimm 0 on channel
-		// 2 = disable dimm 1 on channel
-		// 3 = disable dimm 0+1 on channel
-		.dimm_channel0_disabled = 2,
-		.dimm_channel1_disabled = 2,
-		.max_ddr3_freq = 1333,
-		.usb_port_config = {
+	pei_data->system_type   = 0; /* 0 Mobile, 1 Desktop/Server */
+	pei_data->spd_addresses = { 0xa0, 0x00, 0xa2, 0x00 };
+	pei_data->max_ddr3_freq = 1333;
+
+	pei_data->usb_port_config = {
 #define USB_CONFIG(enabled, current, ocpin) { enabled, ocpin, 0x040 * current }
 #include "usb.h"
-		},
    };
-	*pei_data = pei_data_template;
 }

int mainboard_should_reset_usb(int s3resume)