Shaik Sameeruddin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56890 )
Change subject: ADL: Update c-states in CB ......................................................................
ADL: Update c-states in CB
Signed-off-by: sameeruddin shaik shaik.sameeruddin@intel.com Change-Id: I27e83d56ec0d251078864a20200851fbd8e1de17 --- M src/soc/intel/alderlake/acpi.c M src/soc/intel/alderlake/include/soc/cpu.h 2 files changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/56890/1
diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index b28ec12..27889e2 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -107,7 +107,8 @@
static int cstate_set_s0ix[] = { C_STATE_C1, - C_STATE_C6_LONG_LAT, + C_STATE_C6_SHORT_LAT, + C_STATE_C8, C_STATE_C10 };
diff --git a/src/soc/intel/alderlake/include/soc/cpu.h b/src/soc/intel/alderlake/include/soc/cpu.h index 71c2f47..baa3c17 100644 --- a/src/soc/intel/alderlake/include/soc/cpu.h +++ b/src/soc/intel/alderlake/include/soc/cpu.h @@ -5,11 +5,11 @@
/* Latency times in us */ #define C1_LATENCY 1 -#define C6_LATENCY 127 +#define C6_LATENCY 100 #define C7_LATENCY 253 -#define C8_LATENCY 260 +#define C8_LATENCY 250 #define C9_LATENCY 487 -#define C10_LATENCY 1048 +#define C10_LATENCY 1000
/* Power in units of mW */ #define C1_POWER 0x3e8