Roger Lu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46389 )
Change subject: soc/mediatek/mt8192: add spmfw loader ......................................................................
Patch Set 36:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46389/35/src/soc/mediatek/mt8192/sp... File src/soc/mediatek/mt8192/spm.c:
https://review.coreboot.org/c/coreboot/+/46389/35/src/soc/mediatek/mt8192/sp... PS35, Line 436: 0x40000000
please use DRAM_START instead of hard-coded values. […]
Ok. I'll name it in the next patch.
https://review.coreboot.org/c/coreboot/+/46389/35/src/soc/mediatek/mt8192/sp... PS35, Line 443: BIOS_INFO
more like DEBUG?
Ok. I'll change it to DEBUG.
https://review.coreboot.org/c/coreboot/+/46389/35/src/soc/mediatek/mt8192/sp... PS35, Line 453: if (read32(&mtk_spm->md32pcm_dma0_src) != ptr || : read32(&mtk_spm->md32pcm_dma0_dst) != pmem_start || : read32(&mtk_spm->md32pcm_dma0_wppt) != pmem_words || : read32(&mtk_spm->md32pcm_dma0_wpto) != dmem_start || : read32(&mtk_spm->md32pcm_dma0_count) != total_words || : read32(&mtk_spm->md32pcm_dma0_con) != MD32PCM_DMA0_CON_VAL) {
why do we need to do slave mode if the regs look correct? […]
1. Slave mode won't be used in Chromebook. I save it for completing the mode selection. 2. Currently, we can't. 3. We can read spm_firmware from spm sram back and compare it with the spm_firmware in dram for making sure data consistency. Do we need to do it? Thanks.