Robert Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59642 )
Change subject: mb/google/dedede/var/drawcia: Generate new SPD ID for new memory part ......................................................................
mb/google/dedede/var/drawcia: Generate new SPD ID for new memory part
Add new memory parts in memory_parts_used.txt and generate SPD id for these parts: Samsung K4U6E3S4AA-MGCL
BUG=b:204014463 TEST=run part_id_gen to generate SPD id
Change-Id: Icb0f211508450b16b2e5d214ae6adc9852718a59 --- M src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc M src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt M src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt 3 files changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/59642/1
diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc b/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc index 015541be..74c52f9 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc +++ b/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc @@ -4,4 +4,8 @@ # util/spd_tools/bin/part_id_gen JSL lp4x src/mainboard/google/dedede/variants/drawcia/memory src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt
SPD_SOURCES = +<<<<<<< Updated upstream SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B +======= +SPD_SOURCES += spd/lp4x/set-1/spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B, H54G46CYRBX267, K4U6E3S4AB-MGCL, K4U6E3S4AA-MGCL +>>>>>>> Stashed changes diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt index bcdc762..5fbc84b 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt +++ b/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt @@ -8,3 +8,9 @@ H9HCNNNBKMMLXR-NEE 0 (0000) K4U6E3S4AA-MGCR 0 (0000) MT53E512M32D1NP-046 WT:B 0 (0000) +<<<<<<< Updated upstream +======= +H54G46CYRBX267 0 (0000) +K4U6E3S4AB-MGCL 0 (0000) +K4U6E3S4AA-MGCL 0 (0000) +>>>>>>> Stashed changes diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt b/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt index 09ed381..6387b41 100644 --- a/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt +++ b/src/mainboard/google/dedede/variants/drawcia/memory/mem_parts_used.txt @@ -2,3 +2,9 @@ H9HCNNNBKMMLXR-NEE K4U6E3S4AA-MGCR MT53E512M32D1NP-046 WT:B +<<<<<<< Updated upstream +======= +H54G46CYRBX267 +K4U6E3S4AB-MGCL +K4U6E3S4AA-MGCL +>>>>>>> Stashed changes