Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35880 )
Change subject: kbl boards / fsp2.0: remove redundant CdClock setting
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35880/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/35880/1//COMMIT_MSG@9
PS1, Line 9: already defaults to 3
That's an assumption about the binary used? […]
Yes, this applies to the "default" fsp binary. Well, shouldn't we then set the default values for *all* possible parameters?
However, for SKL/KBL there is no 0=auto value like in CFL/CNL/... is 3 a value we CAN default to explicitely or SKL/KBL (I guess yes, but I'm not 100% certain)?
--
To view, visit
https://review.coreboot.org/c/coreboot/+/35880
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie3bd7f3dc4c795691a04d2eaba0e2458ee50aabb
Gerrit-Change-Number: 35880
Gerrit-PatchSet: 1
Gerrit-Owner: Michael Niewöhner
Gerrit-Reviewer: Hung-Te Lin
hungte@gmail.com
Gerrit-Reviewer: Kyösti Mälkki
kyosti.malkki@gmail.com
Gerrit-Reviewer: Maxim Polyakov
max.senia.poliak@gmail.com
Gerrit-Reviewer: Michael Niewöhner
Gerrit-Reviewer: Nico Huber
nico.h@gmx.de
Gerrit-Reviewer: Patrick Georgi
pgeorgi@google.com
Gerrit-Reviewer: Subrata Banik
subrata.banik@intel.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Tue, 08 Oct 2019 17:47:12 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Nico Huber
nico.h@gmx.de
Gerrit-MessageType: comment