[coreboot-gerrit] [M] Change in coreboot[master]: common/acpi/dptc: Implement DTTS Proposal

[Raul Rangel (Code Review)]

Attention is currently required from: Jason Nien, EricKY Cheng, Matt DeVillier, Martin Roth, Tim Van Patten, Eric Peers, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held.

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 )

Change subject: common/acpi/dptc: Implement DTTS Proposal
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Patch Set 30:

(1 comment)

File src/mainboard/google/skyrim/variants/winterhold/DTTS.asl:

PS30:
> I think you can move this into "mb/google/skyrim/variants/winterhold/acpi/dtts. […]

Hrmm, thinking about this more, the parameters were defined as part of the mdn/chip.h and are used in the mdn/root_complex.c. So I guess this code should be part of the chipset. So move it to src/soc/amd/mendocino/acpi/dtts.asl.

Then add the `#include "dtts.asl"` into the `soc.asl`: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src...

You could maybe modify the PNOT code to look like so:

```
Method (PNOT)
{
    /* Report AC/DC state to ALIB using WAL1() */
    \WAL1 ()

If (CondRefOf (_SB.DTTS)) {
    	_SB.DTTS()
    } Else If (CondRefOf (_SB.DPTC)) {
    	_SB.DPTC()
    }
}
```

Or if you didn't want to copy/paste the DTPC low battery code/tablet code, we could make `DPTC` return 0 when nothing is changed, and 1 when it does change something, so we could have:

```
Method (PNOT)
{
    /* Report AC/DC state to ALIB using WAL1() */
    \WAL1 ()
    
    If (CondRefOf (_SB.DPTC)) {
    	If (!_SB.DPTC() && CondRefOf (_SB.DTTS)) {
    		_SB.DTTS()
    	}
    }
}

```