[coreboot-gerrit] Change in coreboot[master]: mb/google/zork/: add edp tunning parameter to fix the edp noise

[chris wang (Code Review)]

Hello Chris Wang,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/48734

to review the following change.

Change subject: mb/google/zork/: add edp tunning parameter to fix the edp noise
......................................................................

mb/google/zork/: add edp tunning parameter to fix the edp noise

needs to adjust edp phy setting to fix the edp noise for WWAN.

DP_VS_LEVEL0_PREEMPH_LEVEL0, = 0x00 (0.4v 0db) swing 0, pre-emphasis 0)
COMMON_MAR_DEEMPH_NOM = 0x004B
COMMON_SELDEEMPH60 = 0x0
CMD_BUS_GLOBAL_FOR_TX_LANE0 = 0x80

Signed-off-by: Chris Wang 
Change-Id: Ibe720e26d2257e05a989eaa1fd85d542005cf6a6
---
M src/mainboard/google/zork/variants/vilboz/overridetree.cb
1 file changed, 13 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/48734/1

diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
index a3c2c97..b6a886c 100644
--- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
@@ -23,6 +23,19 @@
    register "telemetry_vddcr_soc_slope_mA" = "20001"
    register "telemetry_vddcr_soc_offset" = "168"

+	# eDP phy tunning settings
+	register  "dp_phy_override" = "ENABLE_EDP_TUNINGSET"
+	register  "edp_phy_sel" = "0x1"
+	register  "edp_version" = "0x0"
+	register  "edp_table_size" = "0x05"
+
+	register "edp_tuningset" = "{
+		.dp_vs_pemph_level = 0x0,
+		.deemph_6db4 = 0x004b,
+		.boostadj = 0x0,
+		.margin_deemph = 0x80,
+	}"
+
    # USB OC pin mapping
    register "usb_port_overcurrent_pin[1]" = "USB_OC_NONE"	# LTE instead of USB C1