Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79965?usp=email )
Change subject: mb/lenovo/t520: Convert remaining PCI numbers into reference names ......................................................................
mb/lenovo/t520: Convert remaining PCI numbers into reference names
Change-Id: I18ce899516fd38b21ded1e3144aa22e705c534b8 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/lenovo/t520/devicetree.cb M src/mainboard/lenovo/t520/variants/t520/overridetree.cb M src/mainboard/lenovo/t520/variants/w520/overridetree.cb 3 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/79965/1
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index 3cb18b4..de59198 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -144,8 +144,8 @@ device i2c 5f on end end end # SMBus - device pci 1f.5 off end # IDE controller - device pci 1f.6 off end # Thermal controller + device ref sata2 off end # IDE controller + device ref thermal off end # Thermal controller end end end diff --git a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb index d1634f8..b2c2839 100644 --- a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb @@ -2,7 +2,7 @@ register "spd_addresses" = "{0x50, 0, 0x51, 0}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1f.0 on # LPC bridge + device ref lpc on # LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "has_wwan_detection" = "1" diff --git a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb index 4e03e75..84d4dd6 100644 --- a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb @@ -2,7 +2,7 @@ register "spd_addresses" = "{0x50, 0x52, 0x51, 0x53}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1c.6 on end # PCIe Port #7 USB 3.0 + device ref pcie_rp7 on end # PCIe Port #7 USB 3.0 end end end