Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33389 )
Change subject: sb/intel/common/spi: Check the SPI lock bit before setting FPR ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/#/c/33389/4/src/southbridge/intel/common/spi.c File src/southbridge/intel/common/spi.c:
https://review.coreboot.org/#/c/33389/4/src/southbridge/intel/common/spi.c@1... PS4, Line 1005: "ERROR: SPI already locked, can't setup FPR!\n"); Newer chipsets have more and redundant, "discrete" lock bits, maybe it's better to rely on the test (see below) if the write succeeded.
https://review.coreboot.org/#/c/33389/4/src/southbridge/intel/common/spi.c@1... PS4, Line 1047: reg = read32(&fpr_base[fpr]); Shouldn't this compare the whole register?