[coreboot-gerrit] Change in coreboot[master]: soc/intel/gpio: set default value for RXEVCFG in native mode

[Lance Zhao (Code Review)]

Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41030 )

Change subject: soc/intel/gpio: set default value for RXEVCFG in native mode
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41030/1/src/soc/intel/common/block/... 
File src/soc/intel/common/block/include/intelblocks/gpio_defs.h:

https://review.coreboot.org/c/coreboot/+/41030/1/src/soc/intel/common/block/... 
PS1, Line 202: #define PAD_CFG_NF_BUF_TRIG(pad, pull, rst, func, bufdis, trig) \
> """ […]

Though I will prefer to skip programming and leave those two register fields as default. But looks like "2" is the default anyway for trig, so that shall be fine.
For native mode, the inputs can still get manipulated by Rx registers, so far I have never see any native mode pin will need to touch trig register yet.