Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/59966 )
Change subject: soc/amd/common/block/psp: add psp_efs.c to build for both PSP GEN1&2 ......................................................................
soc/amd/common/block/psp: add psp_efs.c to build for both PSP GEN1&2
The PSP EFS code to get the SPI mode and speed from the amdfw part of the firmware image also works for Stoneyridge which is the one SoC that selects SOC_AMD_COMMON_BLOCK_PSP_GEN1. Also amdblocks/psp_efs.h already handles the SOC_AMD_STONEYRIDGE case.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ibddd3f9237e561d9f0f6b4ad70f59cce1f956986 --- M src/soc/amd/common/block/psp/Makefile.inc 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/59966/1
diff --git a/src/soc/amd/common/block/psp/Makefile.inc b/src/soc/amd/common/block/psp/Makefile.inc index 2b407a2..94dc57c 100644 --- a/src/soc/amd/common/block/psp/Makefile.inc +++ b/src/soc/amd/common/block/psp/Makefile.inc @@ -5,6 +5,9 @@ smm-y += psp.c smm-y += psp_smm.c
+bootblock-y += psp_efs.c +verstage-y += psp_efs.c + endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN1),y) @@ -22,7 +25,4 @@ smm-y += psp_gen2.c smm-y += psp_smm_gen2.c
-bootblock-y += psp_efs.c -verstage-y += psp_efs.c - endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP_GEN2