[coreboot-gerrit] [M] Change in coreboot[master]: soc/intel/common: add power limits update support for variants

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74620 )

Change subject: soc/intel/common: add power limits update support for variants
......................................................................

soc/intel/common: add power limits update support for variants

Add support to update power limit values for variants.

BRANCH=None
BUG=b:270664854
TEST=Built and verified power limit values for 15W SKU on Rex board

Change-Id: I414715f211d816bbfad03a673ca96dd5df94caeb
Signed-off-by: Sumeet Pawnikar 
---
M src/soc/intel/common/block/include/intelblocks/power_limit.h
M src/soc/intel/common/block/power_limit/power_limit.c
2 files changed, 71 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/74620/1

diff --git a/src/soc/intel/common/block/include/intelblocks/power_limit.h b/src/soc/intel/common/block/include/intelblocks/power_limit.h
index 3f18126..140c209 100644
--- a/src/soc/intel/common/block/include/intelblocks/power_limit.h
+++ b/src/soc/intel/common/block/include/intelblocks/power_limit.h
@@ -42,4 +42,17 @@

u8 get_cpu_tdp(void);

+struct cpu_power_limits {
+	uint16_t mchid;
+	u8 cpu_tdp;
+	unsigned int pl1_min_power;
+	unsigned int pl1_max_power;
+	unsigned int pl2_min_power;
+	unsigned int pl2_max_power;
+	unsigned int pl4_power;
+};
+/* Modify Power Limit devictree settings during ramstage */
+void variant_update_power_limits(const struct cpu_power_limits *limits,
+		size_t num_entries);
+
 #endif /* _SOC_INTEL_COMMON_BLOCK_POWER_LIMIT_H_ */
diff --git a/src/soc/intel/common/block/power_limit/power_limit.c b/src/soc/intel/common/block/power_limit/power_limit.c
index d7c9077..935514d 100644
--- a/src/soc/intel/common/block/power_limit/power_limit.c
+++ b/src/soc/intel/common/block/power_limit/power_limit.c
@@ -2,11 +2,16 @@

#include <console/console.h>
 #include <cpu/x86/msr.h>
+#include <device/pci_ops.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/power_limit.h>
 #include <soc/msr.h>
+#include <soc/soc_chip.h>
+#include <soc/pci_devs.h>
 #include <soc/systemagent.h>

+#include <drivers/intel/dptf/chip.h>
+
 /* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */
 static const u8 power_limit_time_sec_to_msr[] = {
    [0]   = 0x00,
@@ -227,3 +232,40 @@

return cpu_tdp / power_unit;
 }
+
+WEAK_DEV_PTR(dptf_policy);
+
+void variant_update_power_limits(const struct cpu_power_limits *limits, size_t num_entries)
+{
+	if (!num_entries)
+		return;
+
+	const struct device *policy_dev = DEV_PTR(dptf_policy);
+	if (!policy_dev)
+		return;
+
+	struct drivers_intel_dptf_config *config = policy_dev->chip_info;
+
+	uint16_t mchid = pci_s_read_config16(PCI_DEV(0, 0, 0), PCI_DEVICE_ID);
+
+	u8 tdp = get_cpu_tdp();
+
+	for (size_t i = 0; i < num_entries; i++) {
+		if (mchid == limits[i].mchid && tdp == limits[i].cpu_tdp) {
+			struct dptf_power_limits *settings = &config->controls.power_limits;
+			config_t *conf = config_of_soc();
+			struct soc_power_limits_config *soc_config = conf->power_limits_config;
+			settings->pl1.min_power = limits[i].pl1_min_power;
+			settings->pl1.max_power = limits[i].pl1_max_power;
+			settings->pl2.min_power = limits[i].pl2_min_power;
+			settings->pl2.max_power = limits[i].pl2_max_power;
+			soc_config->tdp_pl4 = DIV_ROUND_UP(limits[i].pl4_power, MILLIWATTS_TO_WATTS);
+			printk(BIOS_INFO, "Overriding power limits PL1(mW) (%u, %u) PL2(mW) (%u, %u) PL4(W) (%u)\n",
+				settings->pl1.min_power,
+				settings->pl1.max_power,
+				settings->pl2.min_power,
+				settings->pl2.max_power,
+				soc_config->tdp_pl4);
+		}
+	}
+}