[coreboot-gerrit] [S] Change in coreboot[main]: mb/ocp/tiogapass: Implement mainboard_dimm_slot_exists

[Patrick Rudolph (Code Review)]

Attention is currently required from: Johnny Lin, Morgan Jang.

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85318?usp=email )

Change subject: mb/ocp/tiogapass: Implement mainboard_dimm_slot_exists
......................................................................

mb/ocp/tiogapass: Implement mainboard_dimm_slot_exists

The board has 12 slots, each holding one DDR4 ECC RDIMM, on each socket.
Implement mainboard_dimm_slot_exists accordingly to advertise all slots as
SMBIOS type 17.

Change-Id: I31cb4a89aa11258ac04eb69a0e9c86f258280484
Signed-off-by: Patrick Rudolph 
---
M src/mainboard/ocp/tiogapass/romstage.c
1 file changed, 17 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/85318/1

diff --git a/src/mainboard/ocp/tiogapass/romstage.c b/src/mainboard/ocp/tiogapass/romstage.c
index d3063c6..283d5f1 100644
--- a/src/mainboard/ocp/tiogapass/romstage.c
+++ b/src/mainboard/ocp/tiogapass/romstage.c
@@ -1,13 +1,14 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

-#include <fsp/api.h>
-#include <FspmUpd.h>
 #include <drivers/ipmi/ipmi_if.h>
 #include <drivers/ipmi/ocp/ipmi_ocp.h>
+#include <fsp/api.h>
+#include <FspmUpd.h>
+#include <gpio.h>
+#include <soc/ddr.h>
+#include <soc/gpio_soc_defs.h>
 #include <soc/romstage.h>
 #include <string.h>
-#include <gpio.h>
-#include <soc/gpio_soc_defs.h>
 #include <skxsp_tp_iio.h>

#include "ipmi.h"
@@ -64,3 +65,15 @@
    mupd->FspmConfig.GpioConfig.GpioTable = NULL;
    mupd->FspmConfig.GpioConfig.NumberOfEntries = 0;
 }
+
+bool mainboard_dimm_slot_exists(uint8_t socket, uint8_t channel, uint8_t dimm)
+{
+	if (socket >= CONFIG_MAX_SOCKET)
+		return false;
+	if (channel >= 6)
+		return false;
+	if (dimm >= 2)
+		return false;
+
+	return true;
+}