[coreboot-gerrit] [L] Change in coreboot[master]: mb/bytedance: Add 2 SPR sockets server board bd_egs

[TangYiwei (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Elyes Haouas, Felix Held, Felix Singer, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Nill Ge, Patrick Rudolph, Paul Menzel, TangYiwei, [e-mail].

Hello Arthur Heymans, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Nill Ge, Patrick Rudolph, Paul Menzel, build bot (Jenkins), [e-mail],

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/75722?usp=email

to look at the new patch set (#13).

The following approvals got outdated and were removed:
Code-Review+1 by Nico Huber, Code-Review+2 by Lean Sheng Tan, Verified+1 by build bot (Jenkins)

Change subject: mb/bytedance: Add 2 SPR sockets server board bd_egs
......................................................................

mb/bytedance: Add 2 SPR sockets server board bd_egs

Bytedance bd_egs is a dual socket MB with Intel Sapphire Rapids
Scalable Processor chipset.

It's utilising:
- 2 SPR sockets
- Max 32 DIMMs
- 33x CPU PCIe slots
- AST2600 for VGA and BMC remote management

Test:
  The board boots to Linux 5.10 with all 192 cores available.
  All PCIe devices and DIMMS are working.

# sudo dmesg --level alert,crit,err,warn
  [ 46.636896] netlink: 'consul': attribute type 1 has an invalid length.

Change-Id: I091bc78e39cd76b3c6b9a10a1fcf58e9d671ef5d
Co-authored-by: Jinfeng Li 
Co-authored-by: Long Cao 
Co-authored-by: Hao Wang 
Co-authored-by: Chenyu Lan 
Co-authored-by: Lay Kong 
Co-authored-by: Kehong Chen 
Co-authored-by: Ziang Wang 
Co-authored-by: Dong Wei 
Co-authored-by: Chenchen Li 
Signed-off-by: Yiwei Tang 
Reviewed-by: Haitao Nie 
Reviewed-by: Shijian Ge 
---
A src/mainboard/bytedance/Kconfig
A src/mainboard/bytedance/Kconfig.name
A src/mainboard/bytedance/bd_egs/Kconfig
A src/mainboard/bytedance/bd_egs/Kconfig.name
A src/mainboard/bytedance/bd_egs/Makefile.inc
A src/mainboard/bytedance/bd_egs/acpi/platform.asl
A src/mainboard/bytedance/bd_egs/board.fmd
A src/mainboard/bytedance/bd_egs/board_info.txt
A src/mainboard/bytedance/bd_egs/bootblock.c
A src/mainboard/bytedance/bd_egs/devicetree.cb
A src/mainboard/bytedance/bd_egs/dsdt.asl
A src/mainboard/bytedance/bd_egs/gpio.c
A src/mainboard/bytedance/bd_egs/gpio.h
A src/mainboard/bytedance/bd_egs/include/sprsp_bd_iio.h
A src/mainboard/bytedance/bd_egs/ramstage.c
A src/mainboard/bytedance/bd_egs/romstage.c
16 files changed, 757 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/75722/13