[coreboot-gerrit] Patch merged into coreboot/master: b98ab4a armv7: add wrapper for DCCSW (data cache clean by set/way)

the following patch was just integrated into master:
commit b98ab4a893798a5bda9d143943f6930ffaae2b68
Author: David Hendricks 
Date:   Fri Aug 16 12:17:50 2013 -0700

armv7: add wrapper for DCCSW (data cache clean by set/way)

This adds a wrapper for data cache clean (without invalidate)
    by set/way.

Signed-off-by: David Hendricks

Old-Change-Id: I09ee1563890350a6c1d04f1b96ac5d0c042e2af2
    Reviewed-on: https://gerrit.chromium.org/gerrit/66118
    Commit-Queue: David Hendricks 
    Tested-by: David Hendricks 
    Reviewed-by: Ronald G. Minnich 
    (cherry picked from commit 05bc4f8564c547eacb9cc840a03b916b3c1c6001)

armv7: clean but do not invalidate caches between stages

This cleans the caches without invalidating them between stages. The
    dcache content should still be valid when the next stage begins, so
    we should see a small performance gain.

(thanks to gabeblack for pointing this out)

Signed-off-by: David Hendricks

Old-Change-Id: Ie18d163f3a78e2786e9fbc7479c8bd896b8ac3aa
    Reviewed-on: https://gerrit.chromium.org/gerrit/66119
    Commit-Queue: David Hendricks 
    Tested-by: David Hendricks 
    Reviewed-by: Ronald G. Minnich 
    (cherry picked from commit 619bfe4cf9b93847e38d03d7076beb78fbfa1d1d)

armv7: Make coreboot and libpayload cache files the same

This merges the difference between the ARM version of cache.c and
    cache.h for libpayload and coreboot.

Signed-off-by: David Hendricks

Old-Change-Id: I246d2ec98385100304266f4bb15337a8fcf8df93
    Reviewed-on: https://gerrit.chromium.org/gerrit/66120
    Commit-Queue: David Hendricks 
    Tested-by: David Hendricks 
    Reviewed-by: Ronald G. Minnich 
    (cherry picked from commit 0c92f694034f1e94a8aa7811251738c9dc3db2c6)

ARM: Fix cache cleaning operation.

There was no behavior defined for OP_DCCSW in dcache_op_set_way, so it
    silently did nothing. Since we started using that to clean the cache between
    stages and I have a change that enables caches earlier on, this was preventing
    booting on pit.

Old-Change-Id: I3615b6569bf8de195d19d26b62f02932322b7601
    Signed-off-by: Gabe Black 
    Reviewed-on: https://gerrit.chromium.org/gerrit/66234
    Reviewed-by: David Hendricks 
    Commit-Queue: Gabe Black 
    Tested-by: Gabe Black 
    (cherry picked from commit 99241468cb9dcc86fcca9266ffe72baa88a1f79f)

libpayload: Fix data cache cleaning on ARM.

A similar fix was made to coreboot where OP_DCCSW was silently not doing
    anything in dcache_op_set_way.

Old-Change-Id: Ia0798aef0cd02da7d1a14b7affa05038a002ab3b
    Signed-off-by: Gabe Black 
    Reviewed-on: https://gerrit.chromium.org/gerrit/66236
    Reviewed-by: David Hendricks 
    Commit-Queue: Gabe Black 
    Tested-by: Gabe Black 
    (cherry picked from commit 6f6596a182a6780a2e997ac320733722697990c5)

Squashed five related commits.

Change-Id: I763d42bd5dd9f58734e1e21eb7c8ce3ce2ea56ee
    Signed-off-by: Isaac Christensen 
    Reviewed-on: http://review.coreboot.org/6418
    Tested-by: build bot (Jenkins)
    Reviewed-by: David Hendricks 
    Reviewed-by: Edward O'Callaghan

See http://review.coreboot.org/6418 for details.

-gerrit