Timothy Pearson (tpearson@raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8258
-gerrit
commit 3ac4c368f9b8c9e31eb37c55d66c0b32a9619081 Author: Timothy Pearson tpearson@raptorengineeringinc.com Date: Fri Jan 23 20:18:19 2015 -0600
nvidia/ck804/lpc.c: Fix power restoration control
Control bits located by changing tristate power restoration value in proprietary BIOS, booting into Linux, dumping the entire CK804 configuration space, then comparing values against those dumped earlier. "Last state" control bit(s) are unknown at this time.
TEST: Boot ASUS KFSN4-DRE with both coreboot power on and power off after power failure settings, then pull power plug / reinsert power plug and verify mainboard behaviour matches setting.
Change-Id: I737bdd35632fe786968a1cb8458e56c785363cfa Signed-off-by: Timothy Pearson tpearson@raptorengineeringinc.com --- src/southbridge/nvidia/ck804/lpc.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/src/southbridge/nvidia/ck804/lpc.c b/src/southbridge/nvidia/ck804/lpc.c index 9b6049c..b24da6d 100644 --- a/src/southbridge/nvidia/ck804/lpc.c +++ b/src/southbridge/nvidia/ck804/lpc.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2015 Timothy Pearson tpearson@raptorengineeringinc.com, Raptor Engineering * Copyright (C) 2003 Linux Networx * Copyright (C) 2003 SuSE Linux AG * Copyright (C) 2004 Tyan Computer @@ -40,9 +41,12 @@
#define NMI_OFF 0
-// 0x7a or e3 +// Power restoration control register is at 0x7a #define PREVIOUS_POWER_STATE 0x7A
+ // Auxiliary power control register possibly located at 0xe3 +#define PREVIOUS_POWER_STATE_AUX 0xe3 + #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 #define SLOW_CPU_OFF 0 @@ -123,9 +127,9 @@ static void lpc_init(device_t dev) on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL; get_option(&on, "power_on_after_fail"); byte = pci_read_config8(dev, PREVIOUS_POWER_STATE); - byte &= ~0x40; + byte &= ~0x45; if (!on) - byte |= 0x40; + byte |= 0x45; pci_write_config8(dev, PREVIOUS_POWER_STATE, byte); printk(BIOS_INFO, "set power %s after power fail\n", on ? "on" : "off");