Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47436 )
Change subject: soc/intel/alderlake: Add lp5_ccc_config to the board memory configuration ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47436/4/src/soc/intel/alderlake/inc... File src/soc/intel/alderlake/include/soc/meminit.h:
https://review.coreboot.org/c/coreboot/+/47436/4/src/soc/intel/alderlake/inc... PS4, Line 95: Bit Mark:Bits [7:0] What is a *bit mark*?
https://review.coreboot.org/c/coreboot/+/47436/4/src/soc/intel/alderlake/inc... PS4, Line 96: Ascending lowercase?