Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55142 )
Change subject: FSP2.0 platforms: Use bootloader reserved memory for BERT ......................................................................
FSP2.0 platforms: Use bootloader reserved memory for BERT
Currently, a cbmem entry is used to store the BERT data, but when ACPI_BERT is defined, the FSP will save some memory in its reserved area above TOLUM to store the ACPI BERT. This patch moves the area BERT data is stored from cbmem to this reserved region.
TEST=1) Trigger an event which will create a BERT 2) Verify BERT contents look valid 3) Ensure reserved region is covered by an e820 entry marked RESERVED 4) Ensure cbmem contents are still valid
Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org Change-Id: Ibd99fc4a89d559be32be69f8fc73c30782e6ae97 --- M src/drivers/intel/fsp2_0/Makefile.inc A src/drivers/intel/fsp2_0/bert.c M src/soc/intel/common/block/acpi/Kconfig M src/soc/intel/common/block/systemagent/memmap.c 4 files changed, 32 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/55142/1
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 3bbc722..6a98c8a 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -27,6 +27,7 @@ ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c ramstage-y += util.c ramstage-$(CONFIG_MMA) += mma_core.c +ramstage-$(CONFIG_ACPI_BERT) += bert.c
ifneq ($(CONFIG_NO_FSP_TEMP_RAM_EXIT),y) postcar-$(CONFIG_FSP_CAR) += temp_ram_exit.c diff --git a/src/drivers/intel/fsp2_0/bert.c b/src/drivers/intel/fsp2_0/bert.c new file mode 100644 index 0000000..85bbc53 --- /dev/null +++ b/src/drivers/intel/fsp2_0/bert.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <arch/bert_storage.h> +#include <bootmem.h> +#include <cbmem.h> +#include <console/console.h> +#include <types.h> + +void bootmem_platform_add_ranges(void) +{ + bootmem_add_range((uint64_t)((uintptr_t)cbmem_top()), CONFIG_ACPI_BERT_SIZE, BM_MEM_RESERVED); +} + +void bert_reserved_region(void **start, size_t *size) +{ + *start = cbmem_top(); + *size = CONFIG_ACPI_BERT_SIZE; + printk(BIOS_DEBUG, "Using FSP reserved memory for ACPI BERT, start %lx, size %zx\n", + (uintptr_t)*start, *size); +} diff --git a/src/soc/intel/common/block/acpi/Kconfig b/src/soc/intel/common/block/acpi/Kconfig index 6aa3abc..5b2b48a 100644 --- a/src/soc/intel/common/block/acpi/Kconfig +++ b/src/soc/intel/common/block/acpi/Kconfig @@ -21,6 +21,17 @@ help Generate crash data for BERT table
+if SOC_INTEL_COMMON_BLOCK_CRASHLOG + +config ACPI_BERT_SIZE + hex + default 0x10000 if ACPI_BERT + default 0x0 + help + Specify the amount of DRAM reserved for gathering the data used to + generate the ACPI table. +endif + if SOC_INTEL_COMMON_BLOCK_ACPI
config SOC_INTEL_COMMON_BLOCK_ACPI_CPPC diff --git a/src/soc/intel/common/block/systemagent/memmap.c b/src/soc/intel/common/block/systemagent/memmap.c index a67d050..09d13fc 100644 --- a/src/soc/intel/common/block/systemagent/memmap.c +++ b/src/soc/intel/common/block/systemagent/memmap.c @@ -50,22 +50,12 @@ * +---------------------------+ 0 */
-#define BERT_REGION_MAX_SIZE 0x10000 - void smm_region(uintptr_t *start, size_t *size) { *start = sa_get_tseg_base(); *size = sa_get_tseg_size(); }
-void bert_reserved_region(void **start, size_t *size) -{ - *start = cbmem_add(CBMEM_ID_ACPI_BERT, BERT_REGION_MAX_SIZE); - *size = BERT_REGION_MAX_SIZE; - - printk(BIOS_DEBUG, "Reserving BERT start %lx, size %zx\n", (uintptr_t)*start, *size); -} - void fill_postcar_frame(struct postcar_frame *pcf) { /* FSP does not seem to bother w.r.t. alignment when asked to place cbmem_top() */